Skip site navigation (1)Skip section navigation (2)
Date:      Sun, 13 Apr 2003 01:11:57 -0700 (PDT)
From:      Marcel Moolenaar <marcel@FreeBSD.org>
To:        Perforce Change Reviews <perforce@freebsd.org>
Subject:   PERFORCE change 28862 for review
Message-ID:  <200304130811.h3D8Bvgm031396@repoman.freebsd.org>

next in thread | raw e-mail | index | archive | help
http://perforce.freebsd.org/chv.cgi?CH=28862

Change 28862 by marcel@marcel_nfs on 2003/04/13 01:11:20

	o  User scratch predicate registers in exception handling code.
	o  Switch back to the user BSP on exception return.
	o  Set ar.k4, ar.k6 and ar.k7 on exception return.
	o  Add code to fork_trampoline to actually jump to userland.
	   This probably needs to be tweaked to match the EPC syscall
	   path later on.
	o  Bring exec_setregs() in sync.
	
	This brings us all the way to the first syscall, which is
	next on the agenda, after which we need to add support for
	signal delivery.

Affected files ...

.. //depot/projects/ia64_epc/sys/ia64/ia64/exception.s#7 edit
.. //depot/projects/ia64_epc/sys/ia64/ia64/locore.s#8 edit
.. //depot/projects/ia64_epc/sys/ia64/ia64/machdep.c#10 edit

Differences ...

==== //depot/projects/ia64_epc/sys/ia64/ia64/exception.s#7 (text+ko) ====

@@ -44,6 +44,13 @@
  * Arguments:
  *	r16	address of bundle that contains the branch. The
  *		return address will be the next bundle.
+ * Returns:
+ *	p15	interrupted from user stack
+ *	p14	interrupted from kernel stack
+ *	p13	interrupted from user backing store
+ *	p12	interrupted from kernel backing store
+ *	p11	interrupts were enabled
+ *	p10	interrupts were disabled
  */
 ENTRY(exception_save, 0)
 {	.mii
@@ -143,7 +150,7 @@
 {	.mmi
 	st8		[r30]=r18,16		// fpsr
 	st8		[r31]=r17,16		// psr
-	nop		0
+	tbit.nz		p11,p10=r17,14		// p11=interrupts enabled
 	;;
 }
 {	.mmi
@@ -481,32 +488,43 @@
 	ld8.fill	r29=[r30],16		// tp
 	ld8		r22=[r31],16		// rsc
 	;;
+{	.mmi
 	ld8		r23=[r30],16		// fpsr
 	ld8		r24=[r31],16		// psr
+	extr.u		r28=r20,61,3
 	;;
+}
+{	.mmi
 	ld8.fill	r1=[r30],16		// gp
 	ld8		r25=[r31],16		// ndirty
+	cmp.le		p14,p15=5,r28
 	;;
+}
+{	.mmb
 	ld8		r26=[r30]		// cfm
 	ld8		r27=[r31]		// ip
+(p14)	br.cond.sptk	1f
 	;;
+}
 
 	// Switch register stack
-#if 0
 	alloc		r31=ar.pfs,0,0,0,0	// discard current frame
 	shl		r30=r25,16		// value for ar.rsc
 	;;
 	mov		ar.rsc=r30		// setup for loadrs
 	;;
 	loadrs					// load user regs
+	mov		r31=ar.bspstore
 	;;
 	mov		ar.bspstore=r20
+	mov		ar.k6=r31
 	;;
 	mov		ar.rnat=r21
-#endif
+	mov		ar.k4=r13
+	mov		r13=r29
+	;;
 
-	// Don't restore r13 if returning to kernel
-
+1:
 	mov		ar.unat=r16
 	mov		ar.pfs=r19
 	mov		ar.fpsr=r23
@@ -538,7 +556,7 @@
 	mov		r16=ip ;		\
 	br.sptk.few	exception_save ;	\
 } ;						\
-(p3)	ssm	psr.i;				\
+(p11)	ssm	psr.i;				\
 	alloc	r15=ar.pfs,0,0,3,0;		\
 	mov	out0=_n_;			\
 	mov	out1=r14;			\
@@ -589,8 +607,8 @@
 	;; 
 	ld8	r21=[r21]		// check VHPT tag
 	;;
-	cmp.ne	p1,p0=r21,r19
-(p1)	br.dpnt.few 1f
+	cmp.ne	p15,p0=r21,r19
+(p15)	br.dpnt.few 1f
 	;;
 	ld8	r21=[r18]		// read pte
 	mov	pr=r17,0x1ffff
@@ -604,15 +622,15 @@
 	;;
 	srlz.d				// serialize
 	;;
-2:	cmp.eq	p1,p0=r0,r20		// done?
-(p1)	br.cond.spnt.few 9f		// bail if done
+2:	cmp.eq	p15,p0=r0,r20		// done?
+(p15)	br.cond.spnt.few 9f		// bail if done
 	;;
 	add	r21=16,r20		// tag location
 	;;
 	ld8	r21=[r21]		// read tag
 	;;
-	cmp.ne	p1,p0=r21,r19		// compare tags
-(p1)	br.cond.sptk.few 3f		// if not, read next in chain
+	cmp.ne	p15,p0=r21,r19		// compare tags
+(p15)	br.cond.sptk.few 3f		// if not, read next in chain
 	;;
 	ld8	r21=[r20],8		// read pte
 	;; 
@@ -666,8 +684,8 @@
 	;; 
 	ld8	r21=[r21]		// check VHPT tag
 	;;
-	cmp.ne	p1,p0=r21,r19
-(p1)	br.dpnt.few 1f
+	cmp.ne	p15,p0=r21,r19
+(p15)	br.dpnt.few 1f
 	;;
 	ld8	r21=[r18]		// read pte
 	mov	pr=r17,0x1ffff
@@ -681,15 +699,15 @@
 	;;
 	srlz.d				// serialize
 	;;
-2:	cmp.eq	p1,p0=r0,r20		// done?
-(p1)	br.cond.spnt.few 9f		// bail if done
+2:	cmp.eq	p15,p0=r0,r20		// done?
+(p15)	br.cond.spnt.few 9f		// bail if done
 	;;
 	add	r21=16,r20		// tag location
 	;;
 	ld8	r21=[r21]		// read tag
 	;;
-	cmp.ne	p1,p0=r21,r19		// compare tags
-(p1)	br.cond.sptk.few 3f		// if not, read next in chain
+	cmp.ne	p15,p0=r21,r19		// compare tags
+(p15)	br.cond.sptk.few 3f		// if not, read next in chain
 	;;
 	ld8	r21=[r20],8		// read pte
 	;; 
@@ -737,12 +755,12 @@
 	;;
 	extr.u	r17=r16,61,3		// get region number
 	;;
-	cmp.ge	p3,p0=5,r17		// RR0-RR5?
-	cmp.eq	p1,p2=7,r17		// RR7->p1, RR6->p2
-(p3)	br.spnt	9f
+	cmp.ge	p13,p0=5,r17		// RR0-RR5?
+	cmp.eq	p15,p14=7,r17		// RR7->p15, RR6->p14
+(p13)	br.spnt	9f
 	;;
-(p1)	movl	r17=PTE_P+PTE_MA_WB+PTE_A+PTE_D+PTE_PL_KERN+PTE_AR_RX
-(p2)	movl	r17=PTE_P+PTE_MA_UC+PTE_A+PTE_D+PTE_PL_KERN+PTE_AR_RX
+(p15)	movl	r17=PTE_P+PTE_MA_WB+PTE_A+PTE_D+PTE_PL_KERN+PTE_AR_RX
+(p14)	movl	r17=PTE_P+PTE_MA_UC+PTE_A+PTE_D+PTE_PL_KERN+PTE_AR_RX
 	;;
 	dep	r16=0,r16,50,14		// clear bits above PPN
 	;;
@@ -762,12 +780,12 @@
 	;;
 	extr.u	r17=r16,61,3		// get region number
 	;;
-	cmp.ge	p3,p0=5,r17		// RR0-RR5?
-	cmp.eq	p1,p2=7,r17		// RR7->p1, RR6->p2
-(p3)	br.spnt	9f
+	cmp.ge	p13,p0=5,r17		// RR0-RR5?
+	cmp.eq	p15,p14=7,r17		// RR7->p15, RR6->p14
+(p13)	br.spnt	9f
 	;;
-(p1)	movl	r17=PTE_P+PTE_MA_WB+PTE_A+PTE_D+PTE_PL_KERN+PTE_AR_RW
-(p2)	movl	r17=PTE_P+PTE_MA_UC+PTE_A+PTE_D+PTE_PL_KERN+PTE_AR_RW
+(p15)	movl	r17=PTE_P+PTE_MA_WB+PTE_A+PTE_D+PTE_PL_KERN+PTE_AR_RW
+(p14)	movl	r17=PTE_P+PTE_MA_UC+PTE_A+PTE_D+PTE_PL_KERN+PTE_AR_RW
 	;;
 	dep	r16=0,r16,50,14		// clear bits above PPN
 	;;
@@ -811,15 +829,15 @@
 	;;
 	srlz.d				// serialize
 	;;
-1:	cmp.eq	p1,p0=r0,r20		// done?
-(p1)	br.cond.spnt.few 9f		// bail if done
+1:	cmp.eq	p15,p0=r0,r20		// done?
+(p15)	br.cond.spnt.few 9f		// bail if done
 	;;
 	add	r21=16,r20		// tag location
 	;;
 	ld8	r21=[r21]		// read tag
 	;;
-	cmp.ne	p1,p0=r21,r19		// compare tags
-(p1)	br.cond.sptk.few 2f		// if not, read next in chain
+	cmp.ne	p15,p0=r21,r19		// compare tags
+(p15)	br.cond.sptk.few 2f		// if not, read next in chain
 	;;
 	ld8	r21=[r20]		// read pte
 	mov	r22=PTE_D|PTE_A
@@ -880,15 +898,15 @@
 	;;
 	srlz.d				// serialize
 	;;
-1:	cmp.eq	p1,p0=r0,r20		// done?
-(p1)	br.cond.spnt.few 9f		// bail if done
+1:	cmp.eq	p15,p0=r0,r20		// done?
+(p15)	br.cond.spnt.few 9f		// bail if done
 	;;
 	add	r21=16,r20		// tag location
 	;;
 	ld8	r21=[r21]		// read tag
 	;;
-	cmp.ne	p1,p0=r21,r19		// compare tags
-(p1)	br.cond.sptk.few 2f		// if not, read next in chain
+	cmp.ne	p15,p0=r21,r19		// compare tags
+(p15)	br.cond.sptk.few 2f		// if not, read next in chain
 	;;
 	ld8	r21=[r20]		// read pte
 	mov	r22=PTE_A
@@ -949,15 +967,15 @@
 	;;
 	srlz.d				// serialize
 	;;
-1:	cmp.eq	p1,p0=r0,r20		// done?
-(p1)	br.cond.spnt.few 9f		// bail if done
+1:	cmp.eq	p15,p0=r0,r20		// done?
+(p15)	br.cond.spnt.few 9f		// bail if done
 	;;
 	add	r21=16,r20		// tag location
 	;;
 	ld8	r21=[r21]		// read tag
 	;;
-	cmp.ne	p1,p0=r21,r19		// compare tags
-(p1)	br.cond.sptk.few 2f		// if not, read next in chain
+	cmp.ne	p15,p0=r21,r19		// compare tags
+(p15)	br.cond.sptk.few 2f		// if not, read next in chain
 	;;
 	ld8	r21=[r20]		// read pte
 	mov	r22=PTE_A
@@ -1019,8 +1037,8 @@
 
 3:	mov	out0=cr.ivr		// find interrupt vector
 	;;
-	cmp.eq	p6,p0=15,out0		// check for spurious vector number
-(p6)	br.dpnt.few exception_restore	// if spurious, we are done
+	cmp.eq	p15,p0=15,out0		// check for spurious vector number
+(p15)	br.dpnt.few exception_restore	// if spurious, we are done
 	;;
 	ssm	psr.i			// re-enable interrupts
 	;;				// now that we are in-progress

==== //depot/projects/ia64_epc/sys/ia64/ia64/locore.s#8 (text+ko) ====

@@ -144,7 +144,80 @@
 }
 	// If we get back here, it means we're a user space process that's
 	// the immediate result of fork(2).
-	break		0
+	.global		enter_userland
+	.type		enter_userland, @function
+enter_userland:
+{	.mmi
+	alloc		r16=ar.pfs,0,0,0,0
+	mov		ar.rsc=0
+	add		r14=32,sp
+	;;
+}
+{	.mmi
+	loadrs
+	ld8		r31=[r14],32		// sp
+	add		r15=48,sp
+	;;
+}
+{	.mmi
+	ld8		r16=[r15],24		// rp
+	mov		r30=ar.bspstore
+	add		r29=16,sp
+	;;
+}
+{	.mmi
+	ld8		r17=[r14],40		// pfs
+	ld8		r18=[r15],40		// bspstore
+	mov		rp=r16
+	;;
+}
+{	.mlx
+	mov		ar.bspstore=r18
+	movl		r16=0x180000
+	;;
+}
+{	.mmi
+	ld8		r28=[r29]
+	mov		ar.rsc=r16
+	mov		sp=r31
+	;;
+}
+{	.mmi
+	loadrs
+	ld8		r16=[r14],16		// rsc
+	add		r29=r28,r29
+	;;
+}
+{	.mmi
+	mov		ar.rsc=r16
+	ld8		r18=[r15]		// fpsr
+        mov             ar.pfs=r17
+	;;
+}
+{	.mmb
+	ld8		r16=[r14]		// psr
+	mov		ar.fpsr=r18
+	nop		0
+	;;
+}
+{	.mmi
+	mov		psr.l=r16
+	mov		ar.k7=r29
+	nop		0
+	;;
+}
+{	.mmi
+	srlz.d
+	mov		ar.k6=r30
+	nop		0
+	;;
+}
+{	.mmb
+	mov		ar.k4=r13
+	nop		0
+	br.ret.sptk	rp
+	;;
+}
 END(fork_trampoline)
 
 #ifdef SMP

==== //depot/projects/ia64_epc/sys/ia64/ia64/machdep.c#10 (text+ko) ====

@@ -1071,28 +1071,28 @@
 
 	frame = td->td_frame;
 	bzero(frame, sizeof(*frame));
-
-	frame->tf_special.iip = entry;
+	frame->tf_length = sizeof(*frame);
+	frame->tf_flags = FRAME_SYSCALL;
+	frame->tf_special.sp = (stack & ~15) - 16;
+	frame->tf_special.rp = entry;
+	frame->tf_special.pfs = (3UL<<62) | (3UL<<7) | 3UL;
+	frame->tf_special.bspstore = td->td_md.md_bspstore + 24;
+	frame->tf_special.rsc = 0xf;
+	frame->tf_special.fpsr = IA64_FPSR_DEFAULT;
 	frame->tf_special.psr = IA64_PSR_IC | IA64_PSR_I | IA64_PSR_IT |
 	    IA64_PSR_DT | IA64_PSR_RT | IA64_PSR_DFH | IA64_PSR_BN |
 	    IA64_PSR_CPL_USER;
 
-	frame->tf_special.sp = (stack & ~15) - 16;
-
 	/*
 	 * Write values for out0, out1 and out2 to the user's backing
 	 * store and arrange for them to be restored into the user's
 	 * initial register frame. Assumes that (bspstore & 0x1f8) <
 	 * 0x1e0.
 	 */
-	frame->tf_special.bspstore = td->td_md.md_bspstore + 24;
 	suword((caddr_t)frame->tf_special.bspstore - 24, stack);
 	suword((caddr_t)frame->tf_special.bspstore - 16, ps_strings);
 	suword((caddr_t)frame->tf_special.bspstore -  8, 0);
 
-	frame->tf_special.rsc = 0xf;
-	frame->tf_special.fpsr = IA64_FPSR_DEFAULT;
-
 	td->td_md.md_flags &= ~MDP_FPUSED;
 	ia64_fpstate_drop(td);
 }



Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?200304130811.h3D8Bvgm031396>