Date: Sat, 4 Jul 1998 16:20:57 -0400 (EDT) From: zhihuizhang <bf20761@binghamton.edu> To: hackers <freebsd-hackers@FreeBSD.ORG> Subject: Lock mechanism questions Message-ID: <Pine.SOL.L3.93.980704160548.19518B-100000@bingsun1>
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I think lock is done through some test-and-set hardware instruction. I read the Intel documents and find many instructions can be used for such purpose provided you add the LOCK prefix (However, those instructions do not include SAL mentioned in a previous posting). With these in mind, I began search in vain for something like XCHG, CMPXCHG. However, I do find that in file vm/lock.h, there are comments like: "interlock field is used for hardware exclusion, other fields are modified with *normal* instructions after we got the interlock *bit*" I am confused with this comments. Where is the interlock field defined? Which hardware instruction is used to implement atomic operation on it? By the way, I know spin lock is not suitable for interrupt routines that access the same data structures. Can anyone give me a reason for this? Thanks a lot. ------------------------------------------------- Zhihui Zhang Department of Computer Science State University of New York at Binghamton Web Site: http://cs.binghamton.edu/~zzhang ------------------------------------------------- To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-hackers" in the body of the message
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