From owner-freebsd-ppc@FreeBSD.ORG Thu Aug 3 19:39:28 2006 Return-Path: X-Original-To: freebsd-ppc@FreeBSD.org Delivered-To: freebsd-ppc@FreeBSD.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 7780716A4E1; Thu, 3 Aug 2006 19:39:28 +0000 (UTC) (envelope-from sobomax@FreeBSD.org) Received: from sippysoft.com (gk.360sip.com [72.236.70.226]) by mx1.FreeBSD.org (Postfix) with ESMTP id AB8DA43D6B; Thu, 3 Aug 2006 19:39:23 +0000 (GMT) (envelope-from sobomax@FreeBSD.org) Received: from [192.168.1.56] ([204.244.149.125]) (authenticated bits=0) by sippysoft.com (8.13.6/8.13.6) with ESMTP id k73JdKpc046918 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Thu, 3 Aug 2006 12:39:21 -0700 (PDT) (envelope-from sobomax@FreeBSD.org) Message-ID: <44D250CB.9050203@FreeBSD.org> Date: Thu, 03 Aug 2006 12:38:51 -0700 From: Maxim Sobolev Organization: Sippy Software, Inc. User-Agent: Thunderbird 1.5.0.5 (Windows/20060719) MIME-Version: 1.0 To: Peter Grehan References: <44D23F02.9020709@FreeBSD.org> <200608031826.k73IQX835138@makai.watson.ibm.com> <44D2419F.1050100@FreeBSD.org> <44D245E5.4070102@freebsd.org> <44D24772.7080109@FreeBSD.org> <44D24A3F.5080407@freebsd.org> In-Reply-To: <44D24A3F.5080407@freebsd.org> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Cc: freebsd-ppc@FreeBSD.org Subject: Re: Unaligned 64-bits access on FreeBSD/powerpc X-BeenThere: freebsd-ppc@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to the PowerPC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 03 Aug 2006 19:39:28 -0000 Peter Grehan wrote: >> According to the following link, unaligned floating-point 64-bits >> access isn't supported in the PowerPC: >> >> http://www-128.ibm.com/developerworks/library/pa-dalign/ > > Yep, that's right: I should have mentioned that unaligned ints are OK. > Which your program demonstrates :) > >> atype = "64"; >> for (i = 0; i < 256; i++) { >> apoint = (uint8_t *)&(buf[i]); >> v64 = *(uint64_t *)apoint; >> } > > Would you be able to do a disassembly on this ? I suspect gcc is using > floating-point regs to do the 64-bit loads. --- test.c ---- long long test(void) { volatile long long *foo = (long long *)0x1234; return(*foo); } --- test.s --- test: stwu 1,-32(1) stw 31,28(1) mr 31,1 li 0,4660 stw 0,8(31) lwz 9,8(31) lfd 0,0(9) stfd 0,16(31) lwz 9,16(31) lwz 10,20(31) mr 3,9 mr 4,10 lwz 11,0(1) lwz 31,-4(11) mr 1,11 blr -Maxim