Date: Thu, 29 Jul 2021 12:13:59 GMT From: Mark Johnston <markj@FreeBSD.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org Subject: git: 822c62b7db64 - stable/13 - Assert that valid PTEs are not overwritten when installing a new PTP Message-ID: <202107291213.16TCDx7d056603@gitrepo.freebsd.org>
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The branch stable/13 has been updated by markj: URL: https://cgit.FreeBSD.org/src/commit/?id=822c62b7db64bd2a2326e460faf68b5442e4c52c commit 822c62b7db64bd2a2326e460faf68b5442e4c52c Author: Mark Johnston <markj@FreeBSD.org> AuthorDate: 2021-07-15 16:17:33 +0000 Commit: Mark Johnston <markj@FreeBSD.org> CommitDate: 2021-07-29 12:12:12 +0000 Assert that valid PTEs are not overwritten when installing a new PTP amd64 and 32-bit ARM already had assertions to this effect. Add them to other pmaps. Reviewed by: alc, kib Sponsored by: The FreeBSD Foundation (cherry picked from commit b092c58c006fd5c5c051b30ab097f5c1655e0d53) --- sys/arm64/arm64/pmap.c | 6 ++++++ sys/i386/i386/pmap.c | 5 ++++- sys/mips/mips/pmap.c | 4 ++++ sys/powerpc/aim/mmu_radix.c | 8 ++++++-- sys/riscv/riscv/pmap.c | 4 ++++ 5 files changed, 24 insertions(+), 3 deletions(-) diff --git a/sys/arm64/arm64/pmap.c b/sys/arm64/arm64/pmap.c index e9dd27981d61..e57a4033c3a3 100644 --- a/sys/arm64/arm64/pmap.c +++ b/sys/arm64/arm64/pmap.c @@ -1870,6 +1870,8 @@ _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex, struct rwlock **lockp) l0index = ptepindex - (NUL2E + NUL1E); l0 = &pmap->pm_l0[l0index]; + KASSERT((pmap_load(l0) & ATTR_DESCR_VALID) == 0, + ("%s: L0 entry %#lx is valid", __func__, pmap_load(l0))); pmap_store(l0, VM_PAGE_TO_PHYS(m) | L0_TABLE); } else if (ptepindex >= NUL2E) { vm_pindex_t l0index, l1index; @@ -1896,6 +1898,8 @@ _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex, struct rwlock **lockp) l1 = (pd_entry_t *)PHYS_TO_DMAP(pmap_load(l0) & ~ATTR_MASK); l1 = &l1[ptepindex & Ln_ADDR_MASK]; + KASSERT((pmap_load(l1) & ATTR_DESCR_VALID) == 0, + ("%s: L1 entry %#lx is valid", __func__, pmap_load(l1))); pmap_store(l1, VM_PAGE_TO_PHYS(m) | L1_TABLE); } else { vm_pindex_t l0index, l1index; @@ -1938,6 +1942,8 @@ _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex, struct rwlock **lockp) l2 = (pd_entry_t *)PHYS_TO_DMAP(pmap_load(l1) & ~ATTR_MASK); l2 = &l2[ptepindex & Ln_ADDR_MASK]; + KASSERT((pmap_load(l2) & ATTR_DESCR_VALID) == 0, + ("%s: L2 entry %#lx is valid", __func__, pmap_load(l2))); pmap_store(l2, VM_PAGE_TO_PHYS(m) | L2_TABLE); } diff --git a/sys/i386/i386/pmap.c b/sys/i386/i386/pmap.c index bc650cf378e0..b39f1c6f0a55 100644 --- a/sys/i386/i386/pmap.c +++ b/sys/i386/i386/pmap.c @@ -2157,8 +2157,11 @@ _pmap_allocpte(pmap_t pmap, u_int ptepindex, u_int flags) pmap->pm_stats.resident_count++; ptepa = VM_PAGE_TO_PHYS(m); + KASSERT((pmap->pm_pdir[ptepindex] & PG_V) == 0, + ("%s: page directory entry %#jx is valid", + __func__, (uintmax_t)pmap->pm_pdir[ptepindex])); pmap->pm_pdir[ptepindex] = - (pd_entry_t) (ptepa | PG_U | PG_RW | PG_V | PG_A | PG_M); + (pd_entry_t)(ptepa | PG_U | PG_RW | PG_V | PG_A | PG_M); return (m); } diff --git a/sys/mips/mips/pmap.c b/sys/mips/mips/pmap.c index 866013cbf38a..8b0eb1a3ce0b 100644 --- a/sys/mips/mips/pmap.c +++ b/sys/mips/mips/pmap.c @@ -1217,9 +1217,13 @@ _pmap_allocpte(pmap_t pmap, unsigned ptepindex, u_int flags) } /* Next level entry */ pde = (pd_entry_t *)*pdep; + KASSERT(pde[pdeindex] == 0, + ("%s: PTE %p is valid", __func__, pde[pdeindex])); pde[pdeindex] = (pd_entry_t)pageva; } #else + KASSERT(pmap->pm_segtab[ptepindex] == 0, + ("%s: PTE %p is valid", __func__, pmap->pm_segtab[ptepindex])); pmap->pm_segtab[ptepindex] = (pd_entry_t)pageva; #endif pmap->pm_stats.resident_count++; diff --git a/sys/powerpc/aim/mmu_radix.c b/sys/powerpc/aim/mmu_radix.c index 0f5aa2ec151e..b9ca10448f9f 100644 --- a/sys/powerpc/aim/mmu_radix.c +++ b/sys/powerpc/aim/mmu_radix.c @@ -4246,8 +4246,9 @@ _pmap_allocpte(pmap_t pmap, vm_pindex_t ptepindex, struct rwlock **lockp) /* Wire up a new PDPE page */ pml1index = ptepindex - (NUPDE + NUPDPE); l1e = &pmap->pm_pml1[pml1index]; + KASSERT((be64toh(*l1e) & PG_V) == 0, + ("%s: L1 entry %#lx is valid", __func__, *l1e)); pde_store(l1e, VM_PAGE_TO_PHYS(m)); - } else if (ptepindex >= NUPDE) { vm_pindex_t pml1index; vm_pindex_t pdpindex; @@ -4276,8 +4277,9 @@ _pmap_allocpte(pmap_t pmap, vm_pindex_t ptepindex, struct rwlock **lockp) /* Now find the pdp page */ l2e = &l2e[pdpindex & RPTE_MASK]; + KASSERT((be64toh(*l2e) & PG_V) == 0, + ("%s: L2 entry %#lx is valid", __func__, *l2e)); pde_store(l2e, VM_PAGE_TO_PHYS(m)); - } else { vm_pindex_t pml1index; vm_pindex_t pdpindex; @@ -4322,6 +4324,8 @@ _pmap_allocpte(pmap_t pmap, vm_pindex_t ptepindex, struct rwlock **lockp) /* Now we know where the page directory page is */ l3e = &l3e[ptepindex & RPTE_MASK]; + KASSERT((be64toh(*l3e) & PG_V) == 0, + ("%s: L3 entry %#lx is valid", __func__, *l3e)); pde_store(l3e, VM_PAGE_TO_PHYS(m)); } diff --git a/sys/riscv/riscv/pmap.c b/sys/riscv/riscv/pmap.c index 9761d97f449a..9fd66f093d5e 100644 --- a/sys/riscv/riscv/pmap.c +++ b/sys/riscv/riscv/pmap.c @@ -1285,6 +1285,8 @@ _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex, struct rwlock **lockp) l1index = ptepindex - NUL1E; l1 = &pmap->pm_l1[l1index]; + KASSERT((pmap_load(l1) & PTE_V) == 0, + ("%s: L1 entry %#lx is valid", __func__, pmap_load(l1))); pn = (VM_PAGE_TO_PHYS(m) / PAGE_SIZE); entry = (PTE_V); @@ -1314,6 +1316,8 @@ _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex, struct rwlock **lockp) phys = PTE_TO_PHYS(pmap_load(l1)); l2 = (pd_entry_t *)PHYS_TO_DMAP(phys); l2 = &l2[ptepindex & Ln_ADDR_MASK]; + KASSERT((pmap_load(l2) & PTE_V) == 0, + ("%s: L2 entry %#lx is valid", __func__, pmap_load(l2))); pn = (VM_PAGE_TO_PHYS(m) / PAGE_SIZE); entry = (PTE_V);
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