From nobody Wed Apr 8 14:01:31 2026 X-Original-To: dev-commits-src-all@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4frPqv30ZPz6Y9wq for ; Wed, 08 Apr 2026 14:01:31 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R12" (not verified)) by mx1.freebsd.org (Postfix) with ESMTPS id 4frPqv1GjQz3fxN for ; Wed, 08 Apr 2026 14:01:31 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1775656891; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=4hTElqGbRl/6RbNWv4Hgt0iXHgxHqmHaX7pO1uFmNn4=; b=uT1tUbqv/jWmAfJzQdiApsTbFP/qLyDmf2Jy9QTWDXaydYJtIWzXGblun0Q6wnaYY8tDrZ q2XIML30L/SJi7JFam6oBMc6B8Q3D9onV+CWMfwP7PG5VwdQnsg9ghEJ78WtKv7SwfLCNh 1+4XRbpPGYD2SUOMu8vxnynpRfmkRrpm7093M8bET6t6JyuGsTm4WwkzV7YORR4UQxYPbU H27s/O7P7nQ3jwcJ9HtTp23AfYiKdMMIzD5HgCUSDNlla/VgC6NqPQO140NfHPuQsFr8aO sDBfkmjtq2A0Wnic/TuQQFJI8/vmdN6yv671e3UuMs3RKAw0CVokK/Gs4GUKiQ== ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1775656891; a=rsa-sha256; cv=none; b=jGZEdoErvZCcG4OY+tcN/IjaHnrvdNANIAPzA115LXiFaMoBG00efwevqapgVBRu8DWfdl Si/4rShoXXPNA2XsCx5SO+xSkNrYnm8UJtCWISfYeCASq3VPNdg79vP6TvQ1I6pdjuba4D aZBMUuKrfLODZinB3KcwA+eL/5bI9LTIDGOjQ4VwealhcOiJmeUDycvBFy058PxH4VjfoD MbaDfEg1uhj42H2czXyVHyPKgYF7L2ggddJSBJDJvmEbimPhajcg4Pc794MlPWC42lHYQu tmvymkTD3IGBf37UgoIKciWgZcJTvZEoGct2djoe6uAA5eoqFWI30X5zXMPstA== ARC-Authentication-Results: i=1; mx1.freebsd.org; none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1775656891; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=4hTElqGbRl/6RbNWv4Hgt0iXHgxHqmHaX7pO1uFmNn4=; b=HS4LlgS6GgnIatzb0kOKQh8BDVQVeSv6b5H6IPuoyRmDa5P6Bgb8CXBEDXbUpp7smt3UqQ NTt4uJ7dsDdyZe8kedEZmiQ6bvGPv3xf/BSLa4iv4Z1NSxjpcgi96ILHub2IwZzHfi6pYB 94jSMQQsYAKSlsTSNjbSS3tnDv01wWv7a+KcS7l0jTWubvEiBLBNH7Cr7zdSdffblkmG6X EbtNn+uGEA8hi4h7hOATRD/YiGo+z2jXbgXib56j+ZnaGm0glcqiAspQR00jqlpipD5IE1 dEwcxjQIQqwN+w7pxiZHVpDsBFwpcNEEcsCcDry8cL4Ym5LmB1MSOApH1+hItg== Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) by mxrelay.nyi.freebsd.org (Postfix) with ESMTP id 4frPqv0plfzDJB for ; Wed, 08 Apr 2026 14:01:31 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from git (uid 1279) (envelope-from git@FreeBSD.org) id 39de6 by gitrepo.freebsd.org (DragonFly Mail Agent v0.13+ on gitrepo.freebsd.org); Wed, 08 Apr 2026 14:01:31 +0000 To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org Cc: Sarah Walker From: Andrew Turner Subject: git: edc0dd0445b7 - stable/15 - arm64: Enable MOPS usage in the kernel List-Id: Commit messages for all branches of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-all List-Help: List-Post: List-Subscribe: List-Unsubscribe: X-BeenThere: dev-commits-src-all@freebsd.org Sender: owner-dev-commits-src-all@FreeBSD.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: andrew X-Git-Repository: src X-Git-Refname: refs/heads/stable/15 X-Git-Reftype: branch X-Git-Commit: edc0dd0445b762993052ef9d7ff16c845fb03df1 Auto-Submitted: auto-generated Date: Wed, 08 Apr 2026 14:01:31 +0000 Message-Id: <69d65fbb.39de6.28affda@gitrepo.freebsd.org> The branch stable/15 has been updated by andrew: URL: https://cgit.FreeBSD.org/src/commit/?id=edc0dd0445b762993052ef9d7ff16c845fb03df1 commit edc0dd0445b762993052ef9d7ff16c845fb03df1 Author: Sarah Walker AuthorDate: 2026-02-09 20:39:53 +0000 Commit: Andrew Turner CommitDate: 2026-04-08 13:59:53 +0000 arm64: Enable MOPS usage in the kernel Support handling kernel-side MOE exceptions. Reported by: andrew Sponsored by: Arm Ltd Differential Revision: https://reviews.freebsd.org/D54943 (cherry picked from commit 18af5a180b29f425b8427263be5517d3573ca220) --- sys/arm64/arm64/trap.c | 123 +++++++++++++++++++++++++------------------------ 1 file changed, 63 insertions(+), 60 deletions(-) diff --git a/sys/arm64/arm64/trap.c b/sys/arm64/arm64/trap.c index 3de56187657c..b3c68fa4826f 100644 --- a/sys/arm64/arm64/trap.c +++ b/sys/arm64/arm64/trap.c @@ -480,6 +480,66 @@ fpe_trap(struct thread *td, void *addr, uint32_t exception) } #endif +static void +handle_moe(struct thread *td, struct trapframe *frame, uint64_t esr) +{ + uint64_t src; + uint64_t dest; + uint64_t size; + int src_reg; + int dest_reg; + int size_reg; + int format_option; + + format_option = esr & ISS_MOE_FORMAT_OPTION_MASK; + dest_reg = (esr & ISS_MOE_DESTREG_MASK) >> ISS_MOE_DESTREG_SHIFT; + size_reg = (esr & ISS_MOE_SIZEREG_MASK) >> ISS_MOE_SIZEREG_SHIFT; + dest = frame->tf_x[dest_reg]; + size = frame->tf_x[size_reg]; + + /* + * Put the registers back in the original format suitable for a + * prologue instruction, using the generic return routine from the + * Arm ARM (DDI 0487I.a) rules CNTMJ and MWFQH. + */ + if (esr & ISS_MOE_MEMINST) { + /* SET* instruction */ + if (format_option == ISS_MOE_FORMAT_OPTION_A || + format_option == ISS_MOE_FORMAT_OPTION_A2) { + /* Format is from Option A; forward set */ + frame->tf_x[dest_reg] = dest + size; + frame->tf_x[size_reg] = -size; + } + } else { + /* CPY* instruction */ + src_reg = (esr & ISS_MOE_SRCREG_MASK) >> ISS_MOE_SRCREG_SHIFT; + src = frame->tf_x[src_reg]; + + if (format_option == ISS_MOE_FORMAT_OPTION_B || + format_option == ISS_MOE_FORMAT_OPTION_B2) { + /* Format is from Option B */ + if (frame->tf_spsr & PSR_N) { + /* Backward copy */ + frame->tf_x[dest_reg] = dest - size; + frame->tf_x[src_reg] = src + size; + } + } else { + /* Format is from Option A */ + if (frame->tf_x[size_reg] & (1UL << 63)) { + /* Forward copy */ + frame->tf_x[dest_reg] = dest + size; + frame->tf_x[src_reg] = src + size; + frame->tf_x[size_reg] = -size; + } + } + } + + if (esr & ISS_MOE_FROM_EPILOGUE) + frame->tf_elr -= 8; + else + frame->tf_elr -= 4; +} + /* * See the comment above data_abort(). */ @@ -589,6 +649,9 @@ do_el1h_sync(struct thread *td, struct trapframe *frame) print_gp_register("far", far); panic("Branch Target exception"); break; + case EXCP_MOE: + handle_moe(td, frame, esr); + break; default: print_registers(frame); print_gp_register("far", far); @@ -597,66 +660,6 @@ do_el1h_sync(struct thread *td, struct trapframe *frame) } } -static void -handle_moe(struct thread *td, struct trapframe *frame, uint64_t esr) -{ - uint64_t src; - uint64_t dest; - uint64_t size; - int src_reg; - int dest_reg; - int size_reg; - int format_option; - - format_option = esr & ISS_MOE_FORMAT_OPTION_MASK; - dest_reg = (esr & ISS_MOE_DESTREG_MASK) >> ISS_MOE_DESTREG_SHIFT; - size_reg = (esr & ISS_MOE_SIZEREG_MASK) >> ISS_MOE_SIZEREG_SHIFT; - dest = frame->tf_x[dest_reg]; - size = frame->tf_x[size_reg]; - - /* - * Put the registers back in the original format suitable for a - * prologue instruction, using the generic return routine from the - * Arm ARM (DDI 0487I.a) rules CNTMJ and MWFQH. - */ - if (esr & ISS_MOE_MEMINST) { - /* SET* instruction */ - if (format_option == ISS_MOE_FORMAT_OPTION_A || - format_option == ISS_MOE_FORMAT_OPTION_A2) { - /* Format is from Option A; forward set */ - frame->tf_x[dest_reg] = dest + size; - frame->tf_x[size_reg] = -size; - } - } else { - /* CPY* instruction */ - src_reg = (esr & ISS_MOE_SRCREG_MASK) >> ISS_MOE_SRCREG_SHIFT; - src = frame->tf_x[src_reg]; - - if (format_option == ISS_MOE_FORMAT_OPTION_B || - format_option == ISS_MOE_FORMAT_OPTION_B2) { - /* Format is from Option B */ - if (frame->tf_spsr & PSR_N) { - /* Backward copy */ - frame->tf_x[dest_reg] = dest - size; - frame->tf_x[src_reg] = src + size; - } - } else { - /* Format is from Option A */ - if (frame->tf_x[size_reg] & (1UL << 63)) { - /* Forward copy */ - frame->tf_x[dest_reg] = dest + size; - frame->tf_x[src_reg] = src + size; - frame->tf_x[size_reg] = -size; - } - } - } - - if (esr & ISS_MOE_FROM_EPILOGUE) - frame->tf_elr -= 8; - else - frame->tf_elr -= 4; -} - void do_el0_sync(struct thread *td, struct trapframe *frame) {