From owner-svn-src-head@freebsd.org Wed Aug 31 10:45:34 2016 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id A7839BC9D16; Wed, 31 Aug 2016 10:45:34 +0000 (UTC) (envelope-from bz@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 60622D5D; Wed, 31 Aug 2016 10:45:34 +0000 (UTC) (envelope-from bz@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id u7VAjXvo071494; Wed, 31 Aug 2016 10:45:33 GMT (envelope-from bz@FreeBSD.org) Received: (from bz@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id u7VAjXRC071491; Wed, 31 Aug 2016 10:45:33 GMT (envelope-from bz@FreeBSD.org) Message-Id: <201608311045.u7VAjXRC071491@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: bz set sender to bz@FreeBSD.org using -f From: "Bjoern A. Zeeb" Date: Wed, 31 Aug 2016 10:45:33 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r305119 - in head/sys/arm/ti: am335x cpsw X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 31 Aug 2016 10:45:34 -0000 Author: bz Date: Wed Aug 31 10:45:33 2016 New Revision: 305119 URL: https://svnweb.freebsd.org/changeset/base/305119 Log: After r305113, try to properly replace the magic numbers with proper #defines for this driver (not using the wrong header). Modified: head/sys/arm/ti/am335x/am335x_scm.h head/sys/arm/ti/cpsw/if_cpsw.c head/sys/arm/ti/cpsw/if_cpswreg.h Modified: head/sys/arm/ti/am335x/am335x_scm.h ============================================================================== --- head/sys/arm/ti/am335x/am335x_scm.h Wed Aug 31 09:50:02 2016 (r305118) +++ head/sys/arm/ti/am335x/am335x_scm.h Wed Aug 31 10:45:33 2016 (r305119) @@ -42,8 +42,6 @@ #define SCM_USB_STS0 0x624 #define SCM_USB_CTRL1 0x628 #define SCM_USB_STS1 0x62C -#define SCM_MAC_ID0_LO 0x630 -#define SCM_MAC_ID0_HI 0x634 #define SCM_PWMSS_CTRL 0x664 #endif /* __AM335X_SCM_H__ */ Modified: head/sys/arm/ti/cpsw/if_cpsw.c ============================================================================== --- head/sys/arm/ti/cpsw/if_cpsw.c Wed Aug 31 09:50:02 2016 (r305118) +++ head/sys/arm/ti/cpsw/if_cpsw.c Wed Aug 31 10:45:33 2016 (r305119) @@ -1019,14 +1019,14 @@ cpswp_attach(device_t dev) IFQ_SET_READY(&ifp->if_snd); /* Get high part of MAC address from control module (mac_id[0|1]_hi) */ - ti_scm_reg_read_4(SCM_MAC_ID0_HI + sc->unit * 8, ®); + ti_scm_reg_read_4(CPSW_MAC_ID0_HI + sc->unit * 8, ®); mac_addr[0] = reg & 0xFF; mac_addr[1] = (reg >> 8) & 0xFF; mac_addr[2] = (reg >> 16) & 0xFF; mac_addr[3] = (reg >> 24) & 0xFF; /* Get low part of MAC address from control module (mac_id[0|1]_lo) */ - ti_scm_reg_read_4(SCM_MAC_ID0_LO + sc->unit * 8, ®); + ti_scm_reg_read_4(CPSW_MAC_ID0_LO + sc->unit * 8, ®); mac_addr[4] = reg & 0xFF; mac_addr[5] = (reg >> 8) & 0xFF; Modified: head/sys/arm/ti/cpsw/if_cpswreg.h ============================================================================== --- head/sys/arm/ti/cpsw/if_cpswreg.h Wed Aug 31 09:50:02 2016 (r305118) +++ head/sys/arm/ti/cpsw/if_cpswreg.h Wed Aug 31 10:45:33 2016 (r305119) @@ -46,6 +46,9 @@ #define CPSW_PORT_P_SA_LO(p) (CPSW_PORT_OFFSET + 0x120 + ((p-1) * 0x100)) #define CPSW_PORT_P_SA_HI(p) (CPSW_PORT_OFFSET + 0x124 + ((p-1) * 0x100)) +#define CPSW_MAC_ID0_LO 0x0630 +#define CPSW_MAC_ID0_HI 0x0634 + #define CPSW_CPDMA_OFFSET 0x0800 #define CPSW_CPDMA_TX_CONTROL (CPSW_CPDMA_OFFSET + 0x04) #define CPSW_CPDMA_TX_TEARDOWN (CPSW_CPDMA_OFFSET + 0x08)