From owner-svn-src-head@freebsd.org Thu Aug 15 16:22:16 2019 Return-Path: Delivered-To: svn-src-head@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id 92F03ADE55; Thu, 15 Aug 2019 16:22:16 +0000 (UTC) (envelope-from mav@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) server-signature RSA-PSS (4096 bits) client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 468Wtw3R6jz42xl; Thu, 15 Aug 2019 16:22:16 +0000 (UTC) (envelope-from mav@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 5851C1B386; Thu, 15 Aug 2019 16:22:16 +0000 (UTC) (envelope-from mav@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id x7FGMGmU000917; Thu, 15 Aug 2019 16:22:16 GMT (envelope-from mav@FreeBSD.org) Received: (from mav@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id x7FGMGD1000916; Thu, 15 Aug 2019 16:22:16 GMT (envelope-from mav@FreeBSD.org) Message-Id: <201908151622.x7FGMGD1000916@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: mav set sender to mav@FreeBSD.org using -f From: Alexander Motin Date: Thu, 15 Aug 2019 16:22:16 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r351083 - head/sys/dev/ntb/ntb_hw X-SVN-Group: head X-SVN-Commit-Author: mav X-SVN-Commit-Paths: head/sys/dev/ntb/ntb_hw X-SVN-Commit-Revision: 351083 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 15 Aug 2019 16:22:16 -0000 Author: mav Date: Thu Aug 15 16:22:15 2019 New Revision: 351083 URL: https://svnweb.freebsd.org/changeset/base/351083 Log: Fix i386 LINT build after r351056. MFC after: 13 days Modified: head/sys/dev/ntb/ntb_hw/ntb_hw_amd.c Modified: head/sys/dev/ntb/ntb_hw/ntb_hw_amd.c ============================================================================== --- head/sys/dev/ntb/ntb_hw/ntb_hw_amd.c Thu Aug 15 16:09:27 2019 (r351082) +++ head/sys/dev/ntb/ntb_hw/ntb_hw_amd.c Thu Aug 15 16:22:15 2019 (r351083) @@ -385,14 +385,14 @@ amd_ntb_mw_set_trans(device_t dev, unsigned mw_idx, bu /* Make sure the range fits in the usable mw size. */ if (size > bar_info->size) { - amd_ntb_printf(0, "%s: size 0x%x greater than mw_size 0x%x\n", - __func__, (uint32_t)size, (uint32_t)bar_info->size); + amd_ntb_printf(0, "%s: size 0x%jx greater than mw_size 0x%jx\n", + __func__, (uintmax_t)size, (uintmax_t)bar_info->size); return (EINVAL); } - amd_ntb_printf(1, "%s: mw %d mw_size 0x%x size 0x%x base %p\n", - __func__, mw_idx, (uint32_t)bar_info->size, - (uint32_t)size, (void *)bar_info->pci_bus_handle); + amd_ntb_printf(1, "%s: mw %d mw_size 0x%jx size 0x%jx base %p\n", + __func__, mw_idx, (uintmax_t)bar_info->size, + (uintmax_t)size, (void *)bar_info->pci_bus_handle); /* * AMD NTB XLAT and Limit registers needs to be written only after @@ -413,17 +413,17 @@ amd_ntb_mw_set_trans(device_t dev, unsigned mw_idx, bu * cases all use 64-bit bar. */ if ((mw_idx == 0) && (ntb->hw_info->quirks & QUIRK_MW0_32BIT)) { - amd_ntb_reg_write(4, bar_info->limit_off, (uint64_t)size); + amd_ntb_reg_write(4, bar_info->limit_off, (uint32_t)size); amd_ntb_printf(1, "%s: limit_off 0x%x cur_val 0x%x limit 0x%x\n", __func__, bar_info->limit_off, amd_ntb_peer_reg_read(4, bar_info->limit_off), (uint32_t)size); } else { amd_ntb_reg_write(8, bar_info->limit_off, (uint64_t)size); - amd_ntb_printf(1, "%s: limit_off 0x%x cur_val 0x%lx limit 0x%x\n", + amd_ntb_printf(1, "%s: limit_off 0x%x cur_val 0x%jx limit 0x%jx\n", __func__, bar_info->limit_off, amd_ntb_peer_reg_read(8, bar_info->limit_off), - (uint32_t)size); + (uintmax_t)size); } return (0);