From owner-svn-src-all@freebsd.org Wed Jan 25 10:32:58 2017 Return-Path: Delivered-To: svn-src-all@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id BC19BCBF900; Wed, 25 Jan 2017 10:32:58 +0000 (UTC) (envelope-from wma@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 8BCA6950; Wed, 25 Jan 2017 10:32:58 +0000 (UTC) (envelope-from wma@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v0PAWvfX050930; Wed, 25 Jan 2017 10:32:57 GMT (envelope-from wma@FreeBSD.org) Received: (from wma@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v0PAWvSH050928; Wed, 25 Jan 2017 10:32:57 GMT (envelope-from wma@FreeBSD.org) Message-Id: <201701251032.v0PAWvSH050928@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: wma set sender to wma@FreeBSD.org using -f From: Wojciech Macek Date: Wed, 25 Jan 2017 10:32:57 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r312748 - head/sys/dev/ahci X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 25 Jan 2017 10:32:58 -0000 Author: wma Date: Wed Jan 25 10:32:57 2017 New Revision: 312748 URL: https://svnweb.freebsd.org/changeset/base/312748 Log: Enable optional soft reset in AHCI It occurred that some Marvell integrated controllers require additional time after soft reset to work properly. Introduce new quirk (AHCI_Q_MRVL_SR_DEL), that enable such operation. Submitted by: Konrad Adamczyk Obtained from: Semihalf Sponsored by: Stormshield Reviewed by: mav Differential revision: https://reviews.freebsd.org/D9221 Modified: head/sys/dev/ahci/ahci.c head/sys/dev/ahci/ahci.h Modified: head/sys/dev/ahci/ahci.c ============================================================================== --- head/sys/dev/ahci/ahci.c Wed Jan 25 10:31:16 2017 (r312747) +++ head/sys/dev/ahci/ahci.c Wed Jan 25 10:32:57 2017 (r312748) @@ -1598,6 +1598,14 @@ ahci_execute_transaction(struct ahci_slo } /* + * Some Marvell controllers require additional time + * after soft reset to work properly. Setup delay + * to 50ms after soft reset. + */ + if (ch->quirks & AHCI_Q_MRVL_SR_DEL) + DELAY(50000); + + /* * Marvell HBAs with non-RAID firmware do not wait for * readiness after soft reset, so we have to wait here. * Marvell RAIDs do not have this problem, but instead Modified: head/sys/dev/ahci/ahci.h ============================================================================== --- head/sys/dev/ahci/ahci.h Wed Jan 25 10:31:16 2017 (r312747) +++ head/sys/dev/ahci/ahci.h Wed Jan 25 10:32:57 2017 (r312748) @@ -598,6 +598,7 @@ enum ahci_err_type { #define AHCI_Q_FORCE_PI 0x00040000 #define AHCI_Q_RESTORE_CAP 0x00080000 #define AHCI_Q_NOMSIX 0x00100000 +#define AHCI_Q_MRVL_SR_DEL 0x00200000 #define AHCI_Q_BIT_STRING \ "\020" \