Date: Sun, 12 Apr 2015 10:28:16 +0000 (UTC) From: Konstantin Belousov <kib@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r281462 - head/sys/dev/acpica Message-ID: <201504121028.t3CASGlZ010801@svn.freebsd.org>
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Author: kib Date: Sun Apr 12 10:28:15 2015 New Revision: 281462 URL: https://svnweb.freebsd.org/changeset/base/281462 Log: Define capabilities bits from the revision 007 of the document 302223 "Intelб╝ Processor Vendor-Specific ACPI Interface Specification", issied Dec 2014. Previous revision 005 was from Sep 2006. Sponsored by: The FreeBSD Foundation MFC after: 1 week Modified: head/sys/dev/acpica/acpivar.h Modified: head/sys/dev/acpica/acpivar.h ============================================================================== --- head/sys/dev/acpica/acpivar.h Sun Apr 12 09:36:50 2015 (r281461) +++ head/sys/dev/acpica/acpivar.h Sun Apr 12 10:28:15 2015 (r281462) @@ -185,7 +185,7 @@ extern struct mtx acpi_mutex; * Various features and capabilities for the acpi_get_features() method. * In particular, these are used for the ACPI 3.0 _PDC and _OSC methods. * See the Intel document titled "Intel Processor Vendor-Specific ACPI", - * number 302223-005. + * number 302223-007. */ #define ACPI_CAP_PERF_MSRS (1 << 0) /* Intel SpeedStep PERF_CTL MSRs */ #define ACPI_CAP_C1_IO_HALT (1 << 1) /* Intel C1 "IO then halt" sequence */ @@ -198,6 +198,9 @@ extern struct mtx acpi_mutex; #define ACPI_CAP_SMP_C1_NATIVE (1 << 8) /* MP C1 support other than halt */ #define ACPI_CAP_SMP_C3_NATIVE (1 << 9) /* MP C2 and C3 support */ #define ACPI_CAP_PX_HW_COORD (1 << 11) /* Intel P-state HW coordination */ +#define ACPI_CAP_INTR_CPPC (1 << 12) /* Native Interrupt Handling for + Collaborative Processor Performance Control notifications */ +#define ACPI_CAP_HW_DUTY_C (1 << 13) /* Hardware Duty Cycling */ /* * Quirk flags.
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