From owner-svn-src-stable-12@freebsd.org Sun Jun 28 17:49:42 2020 Return-Path: Delivered-To: svn-src-stable-12@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id 58BEB351A57; Sun, 28 Jun 2020 17:49:42 +0000 (UTC) (envelope-from mhorne@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 49vyn21fBjz4fxW; Sun, 28 Jun 2020 17:49:42 +0000 (UTC) (envelope-from mhorne@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 2F96B1A052; Sun, 28 Jun 2020 17:49:42 +0000 (UTC) (envelope-from mhorne@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id 05SHngkx099652; Sun, 28 Jun 2020 17:49:42 GMT (envelope-from mhorne@FreeBSD.org) Received: (from mhorne@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id 05SHngdT099651; Sun, 28 Jun 2020 17:49:42 GMT (envelope-from mhorne@FreeBSD.org) Message-Id: <202006281749.05SHngdT099651@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: mhorne set sender to mhorne@FreeBSD.org using -f From: Mitchell Horne Date: Sun, 28 Jun 2020 17:49:42 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-12@freebsd.org Subject: svn commit: r362731 - stable/12/share/man/man7 X-SVN-Group: stable-12 X-SVN-Commit-Author: mhorne X-SVN-Commit-Paths: stable/12/share/man/man7 X-SVN-Commit-Revision: 362731 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-stable-12@freebsd.org X-Mailman-Version: 2.1.33 Precedence: list List-Id: SVN commit messages for only the 12-stable src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 28 Jun 2020 17:49:42 -0000 Author: mhorne Date: Sun Jun 28 17:49:41 2020 New Revision: 362731 URL: https://svnweb.freebsd.org/changeset/base/362731 Log: MFC r362546: arch(7): small corrections for RISC-V Modified: stable/12/share/man/man7/arch.7 Directory Properties: stable/12/ (props changed) Modified: stable/12/share/man/man7/arch.7 ============================================================================== --- stable/12/share/man/man7/arch.7 Sun Jun 28 17:47:41 2020 (r362730) +++ stable/12/share/man/man7/arch.7 Sun Jun 28 17:49:41 2020 (r362731) @@ -26,7 +26,7 @@ .\" .\" $FreeBSD$ .\" -.Dd January 8, 2020 +.Dd June 23, 2020 .Dt ARCH 7 .Os .Sh NAME @@ -258,8 +258,8 @@ is 8 bytes on all supported architectures except i386. .It powerpc Ta 4K .It powerpcspe Ta 4K .It powerpc64 Ta 4K -.It riscv64 Ta 4K -.It riscv64sf Ta 4K +.It riscv64 Ta 4K, 2M, 1G +.It riscv64sf Ta 4K, 2M, 1G .It sparc64 Ta 8K .El .Ss Floating Point @@ -283,8 +283,8 @@ is 8 bytes on all supported architectures except i386. .It powerpc Ta hard Ta hard, double precision .It powerpcspe Ta hard Ta hard, double precision .It powerpc64 Ta hard Ta hard, double precision -.It riscv64 Ta hard Ta hard, double precision -.It riscv64sf Ta soft Ta soft, double precision +.It riscv64 Ta hard Ta hard, quad precision +.It riscv64sf Ta soft Ta soft, quad precision .It sparc64 Ta hard Ta hard, quad precision .El .Pp @@ -378,7 +378,7 @@ Architecture-specific macros: .It powerpcspe Ta Dv __powerpc__, Dv __SPE__ .It powerpc64 Ta Dv __powerpc__, Dv __powerpc64__ .It riscv64 Ta Dv __riscv, Dv __riscv_xlen == 64 -.It riscv64sf Ta Dv __riscv, Dv __riscv_xlen == 64 +.It riscv64sf Ta Dv __riscv, Dv __riscv_xlen == 64, Dv __riscv_float_abi_soft .It sparc64 Ta Dv __sparc64__ .El .Pp