From owner-svn-src-all@FreeBSD.ORG Tue Aug 5 18:51:52 2014 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id EF3C5643 for ; Tue, 5 Aug 2014 18:51:52 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id C5C4A270C for ; Tue, 5 Aug 2014 18:51:52 +0000 (UTC) Received: from ian (uid 1311) (envelope-from ian@FreeBSD.org) id 50f3 by svn.freebsd.org (DragonFly Mail Agent v0.9+); Tue, 05 Aug 2014 18:51:52 +0000 From: Ian Lepore Date: Tue, 5 Aug 2014 18:51:52 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r269605 - head/sys/arm/arm X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Message-Id: <53e127c8.50f3.3c5653e1@svn.freebsd.org> X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 05 Aug 2014 18:51:53 -0000 Author: ian Date: Tue Aug 5 18:51:51 2014 New Revision: 269605 URL: http://svnweb.freebsd.org/changeset/base/269605 Log: Attach arm generic interrupt and timer drivers in the middle of BUS_PASS_INTERRUPT and BUS_PASS_TIMER, respectively. Modified: head/sys/arm/arm/generic_timer.c head/sys/arm/arm/gic.c head/sys/arm/arm/mpcore_timer.c head/sys/arm/arm/pl190.c Modified: head/sys/arm/arm/generic_timer.c ============================================================================== --- head/sys/arm/arm/generic_timer.c Tue Aug 5 18:48:12 2014 (r269604) +++ head/sys/arm/arm/generic_timer.c Tue Aug 5 18:51:51 2014 (r269605) @@ -343,7 +343,8 @@ static driver_t arm_tmr_driver = { static devclass_t arm_tmr_devclass; -DRIVER_MODULE(timer, simplebus, arm_tmr_driver, arm_tmr_devclass, 0, 0); +EARLY_DRIVER_MODULE(timer, simplebus, arm_tmr_driver, arm_tmr_devclass, 0, 0, + BUS_PASS_TIMER + BUS_PASS_ORDER_MIDDLE); void DELAY(int usec) Modified: head/sys/arm/arm/gic.c ============================================================================== --- head/sys/arm/arm/gic.c Tue Aug 5 18:48:12 2014 (r269604) +++ head/sys/arm/arm/gic.c Tue Aug 5 18:51:51 2014 (r269605) @@ -264,7 +264,8 @@ static driver_t arm_gic_driver = { static devclass_t arm_gic_devclass; -DRIVER_MODULE(gic, simplebus, arm_gic_driver, arm_gic_devclass, 0, 0); +EARLY_DRIVER_MODULE(gic, simplebus, arm_gic_driver, arm_gic_devclass, 0, 0, + BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE); static void gic_post_filter(void *arg) Modified: head/sys/arm/arm/mpcore_timer.c ============================================================================== --- head/sys/arm/arm/mpcore_timer.c Tue Aug 5 18:48:12 2014 (r269604) +++ head/sys/arm/arm/mpcore_timer.c Tue Aug 5 18:51:51 2014 (r269605) @@ -382,7 +382,8 @@ static driver_t arm_tmr_driver = { static devclass_t arm_tmr_devclass; -DRIVER_MODULE(mp_tmr, simplebus, arm_tmr_driver, arm_tmr_devclass, 0, 0); +EARLY_DRIVER_MODULE(mp_tmr, simplebus, arm_tmr_driver, arm_tmr_devclass, 0, 0, + BUS_PASS_TIMER + BUS_PASS_ORDER_MIDDLE); /* * Handle a change in clock frequency. The mpcore timer runs at half the CPU Modified: head/sys/arm/arm/pl190.c ============================================================================== --- head/sys/arm/arm/pl190.c Tue Aug 5 18:48:12 2014 (r269604) +++ head/sys/arm/arm/pl190.c Tue Aug 5 18:51:51 2014 (r269605) @@ -152,7 +152,8 @@ static driver_t pl190_intc_driver = { static devclass_t pl190_intc_devclass; -DRIVER_MODULE(intc, simplebus, pl190_intc_driver, pl190_intc_devclass, 0, 0); +EARLY_DRIVER_MODULE(intc, simplebus, pl190_intc_driver, pl190_intc_devclass, + 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE); int arm_get_next_irq(int last_irq)