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Date:      Wed, 24 Sep 2003 02:35:56 +0800
From:      "John Walsh" <high@bsdmail.org>
To:        freebsd-questions@FreeBSD.ORG
Subject:   Cyrix MII-300 kernel config
Message-ID:  <20030923183557.32377.qmail@bsdmail.com>

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Hello all, I ws looking in the LINT file for kernel options for the 
Cyrix MII-300, rev 2.9(I think, or is that 2.9Volts), and I came across this :

options "CPU_BLUELIGHTNING_FPU_OP_CACHE"
    CPU_BLUELIGHTNING_FPU_OP_CACHE enables 
    FPU operand cache on IBM BlueLightning 
    CPU. It works only with Cyrix FPU, and 
    this option should not be used with Intel FPU.
 
options "CPU_BLUELIGHTNING_3X"
    CPU_BLUELIGHTNING_3X enables triple-clock mode
    on IBM Blue Lightning CPU if CPU supports it. 
    The default is double-clock mode on BlueLightning CPU box.

I read thet is says : "It works only with Cyrix FPU" for the first one, so should I use it?
What about the second option?


options "CPU_SUSP_HLT"
    CPU_SUSP_HLT enables suspend on HALT. If this option 
    is set, CPU enters suspend mode following execution of HALT instruction.
 
options "CPU_IORT=7"
    CPU_IORT defines I/O clock delay time. Default vaules of I/O clock delay 
    time on Cyrix 6x86 is 7 (no clock delay)

options "CPU_WT_ALLOC" enables write allocation on Cyrix 6x86/6x86MX and AMD K5/K6/K6-2 cpus.

those should be ok right?

options "CYRIX_CACHE_REALLY_WORKS"
    CYRIX_CACHE_REALLY_WORKS enables write-back CPU cache on Cyrix 6x86 whose revision < 2.7.

I guess that depends on my rev. version.

Do I need this :

CPU_CYRIX_NO_LOCK enables weak locking for the entire address space
# of Cyrix 6x86 and 6x86MX CPUs by setting the NO_LOCK bit of CCR1.
# Otherwise, the NO_LOCK bit of CCR1 is cleared.

or is my rev. high enough (if it is 2.9)?

I found this sites that talk about some of these :

http://people.freebsd.org/~kato/cpuident.html
http://wauug.erols.com/~balsa/linux/cyrix/p11.html

Thank you,
Gab

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