From owner-freebsd-current@FreeBSD.ORG Thu Jul 10 02:03:11 2003 Return-Path: Delivered-To: freebsd-current@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 6BC9837B401 for ; Thu, 10 Jul 2003 02:03:11 -0700 (PDT) Received: from puffin.mail.pas.earthlink.net (puffin.mail.pas.earthlink.net [207.217.120.139]) by mx1.FreeBSD.org (Postfix) with ESMTP id D14B843F3F for ; Thu, 10 Jul 2003 02:03:10 -0700 (PDT) (envelope-from tlambert2@mindspring.com) Received: from user-2ivfjrs.dialup.mindspring.com ([165.247.207.124] helo=mindspring.com) by puffin.mail.pas.earthlink.net with asmtp (SSLv3:RC4-MD5:128) (Exim 3.33 #1) id 19aXKI-0003EA-00; Thu, 10 Jul 2003 02:02:55 -0700 Message-ID: <3F0D2B83.379F3DE@mindspring.com> Date: Thu, 10 Jul 2003 02:01:55 -0700 From: Terry Lambert X-Mailer: Mozilla 4.79 [en] (Win98; U) X-Accept-Language: en MIME-Version: 1.0 To: Wilko Bulte References: <20030709150718.GC28375@Odin.AC.HMC.Edu> <20030709172638.GA53512@freebie.xs4all.nl> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-ELNK-Trace: b1a02af9316fbb217a47c185c03b154d40683398e744b8a4efbd7fd7fcd5a1ae24fbb36046f688e03ca473d225a0f487350badd9bab72f9c350badd9bab72f9c cc: "Thomas T. Veldhouse" cc: FreeBSD-Current Subject: Re: HTT on single CPU? X-BeenThere: freebsd-current@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: Discussions about the use of FreeBSD-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 10 Jul 2003 09:03:11 -0000 Wilko Bulte wrote: > On Wed, Jul 09, 2003 at 10:14:47AM -0500, Thomas T. Veldhouse wrote: > > I can confirm my 2.4G P4 does have HTT: This is unfortunately not definitive for CPUs other than your own. The "Intel Extends..." announcement that was quoted really means two things: o Parts with those speeds fabricated before "Intel Extends..." announcement *don't* support it. o Parts fabricated after the anouncement *may* support it, or may require specific parts/steppings, out of the set of those currently being fabricated, in order to support it. So it's still necessary to look at the CPUID result and the probe result messages out of dmesg for other people who think P4 == HTT automatically, because your part may be from an older mask, and even if there are no older masks currently in fabrication, it could have sat in a cardboard box in a warehouse for a long time before it fell into your hands. To add to the confusion, the "slower" P4's they announce may have been downclocked out of a large fabrication run that failed to pass certification testing at the higher speed, and had their gates lasered to "turn them into" lower speed parts; and the announcement was just Intel's way of recovering part of their loss on the deal (yeah, I know, I'm a cynic ;^)). -- Terry