From owner-svn-src-head@freebsd.org Wed Jul 1 19:15:43 2020 Return-Path: Delivered-To: svn-src-head@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id EA359359F12; Wed, 1 Jul 2020 19:15:43 +0000 (UTC) (envelope-from kp@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 49xrXv5yFYz4tfH; Wed, 1 Jul 2020 19:15:43 +0000 (UTC) (envelope-from kp@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id AFAC8E26D; Wed, 1 Jul 2020 19:15:43 +0000 (UTC) (envelope-from kp@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id 061JFhCG033041; Wed, 1 Jul 2020 19:15:43 GMT (envelope-from kp@FreeBSD.org) Received: (from kp@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id 061JFhhu033038; Wed, 1 Jul 2020 19:15:43 GMT (envelope-from kp@FreeBSD.org) Message-Id: <202007011915.061JFhhu033038@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: kp set sender to kp@FreeBSD.org using -f From: Kristof Provost Date: Wed, 1 Jul 2020 19:15:43 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r362853 - in head/sys/riscv: include riscv X-SVN-Group: head X-SVN-Commit-Author: kp X-SVN-Commit-Paths: in head/sys/riscv: include riscv X-SVN-Commit-Revision: 362853 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.33 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 01 Jul 2020 19:15:44 -0000 Author: kp Date: Wed Jul 1 19:15:43 2020 New Revision: 362853 URL: https://svnweb.freebsd.org/changeset/base/362853 Log: riscv pmap: zero reserved pte bits in ppn The top 10 bits of a pte are reserved by specification[1] and are not part of the PPN. [1] 'Volume II: RISC-V Privileged Architectures V20190608-Priv-MSU-Ratified', '4.4.1 Addressing and Memory Protection', page 72: "The PTE format for Sv39 is shown in Figure 4.18. ... Bits 63–54 are reserved for future use and must be zeroed by software for forward compatibility." Submitted by: Nathaniel Filardo Reviewed by: kp, mhorne Differential Revision: https://reviews.freebsd.org/D25523 Modified: head/sys/riscv/include/pte.h head/sys/riscv/riscv/pmap.c Modified: head/sys/riscv/include/pte.h ============================================================================== --- head/sys/riscv/include/pte.h Wed Jul 1 19:12:47 2020 (r362852) +++ head/sys/riscv/include/pte.h Wed Jul 1 19:15:43 2020 (r362853) @@ -83,6 +83,9 @@ typedef uint64_t pn_t; /* page number */ #define PTE_PROMOTE (PTE_V | PTE_RWX | PTE_D | PTE_A | PTE_G | PTE_U | \ PTE_SW_MANAGED | PTE_SW_WIRED) +/* Bits 63 - 54 are reserved for future use. */ +#define PTE_HI_MASK 0xFFC0000000000000ULL + #define PTE_PPN0_S 10 #define PTE_PPN1_S 19 #define PTE_PPN2_S 28 Modified: head/sys/riscv/riscv/pmap.c ============================================================================== --- head/sys/riscv/riscv/pmap.c Wed Jul 1 19:12:47 2020 (r362852) +++ head/sys/riscv/riscv/pmap.c Wed Jul 1 19:15:43 2020 (r362853) @@ -339,7 +339,8 @@ pagezero(void *p) #define pmap_l2_index(va) (((va) >> L2_SHIFT) & Ln_ADDR_MASK) #define pmap_l3_index(va) (((va) >> L3_SHIFT) & Ln_ADDR_MASK) -#define PTE_TO_PHYS(pte) ((pte >> PTE_PPN0_S) * PAGE_SIZE) +#define PTE_TO_PHYS(pte) \ + ((((pte) & ~PTE_HI_MASK) >> PTE_PPN0_S) * PAGE_SIZE) static __inline pd_entry_t * pmap_l1(pmap_t pmap, vm_offset_t va)