From owner-svn-src-head@freebsd.org Mon Sep 7 06:32:04 2020 Return-Path: Delivered-To: svn-src-head@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id 770873EA9AB; Mon, 7 Sep 2020 06:32:04 +0000 (UTC) (envelope-from avg@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4BlJNN1Rllz3TK4; Mon, 7 Sep 2020 06:32:04 +0000 (UTC) (envelope-from avg@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 1542E1B3D0; Mon, 7 Sep 2020 06:32:04 +0000 (UTC) (envelope-from avg@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id 0876W3Bq038342; Mon, 7 Sep 2020 06:32:03 GMT (envelope-from avg@FreeBSD.org) Received: (from avg@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id 0876W37l038177; Mon, 7 Sep 2020 06:32:03 GMT (envelope-from avg@FreeBSD.org) Message-Id: <202009070632.0876W37l038177@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: avg set sender to avg@FreeBSD.org using -f From: Andriy Gapon Date: Mon, 7 Sep 2020 06:32:03 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r365397 - head/sys/dev/iicbus/twsi X-SVN-Group: head X-SVN-Commit-Author: avg X-SVN-Commit-Paths: head/sys/dev/iicbus/twsi X-SVN-Commit-Revision: 365397 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.33 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 07 Sep 2020 06:32:04 -0000 Author: avg Date: Mon Sep 7 06:32:03 2020 New Revision: 365397 URL: https://svnweb.freebsd.org/changeset/base/365397 Log: twsi: some variants clear interrupt flag by writing 0, others by writing 1 Make that distinction more explicit and regular in the code. The difference in behavior is documented in the respective datasheets. Previously, the code handled the distinction by writing the control register multiple times where at least one write was zero and another was one. This can be considered a follow-up to r363021. Reviewed by: manu MFC after: 4 weeks Differential Revision: https://reviews.freebsd.org/D26308 Modified: head/sys/dev/iicbus/twsi/a10_twsi.c head/sys/dev/iicbus/twsi/twsi.c head/sys/dev/iicbus/twsi/twsi.h Modified: head/sys/dev/iicbus/twsi/a10_twsi.c ============================================================================== --- head/sys/dev/iicbus/twsi/a10_twsi.c Mon Sep 7 06:29:41 2020 (r365396) +++ head/sys/dev/iicbus/twsi/a10_twsi.c Mon Sep 7 06:32:03 2020 (r365397) @@ -122,6 +122,10 @@ a10_twsi_attach(device_t dev) sc->reg_soft_reset = TWI_SRST; sc->need_ack = true; + + if (ofw_bus_is_compatible(dev, "allwinner,sun6i-a31-i2c") || + ofw_bus_is_compatible(dev, "allwinner,sun6i-a83t-i2c")) + sc->iflag_w1c = true; return (twsi_attach(dev)); } Modified: head/sys/dev/iicbus/twsi/twsi.c ============================================================================== --- head/sys/dev/iicbus/twsi/twsi.c Mon Sep 7 06:29:41 2020 (r365396) +++ head/sys/dev/iicbus/twsi/twsi.c Mon Sep 7 06:32:03 2020 (r365397) @@ -147,7 +147,11 @@ twsi_clear_iflg(struct twsi_softc *sc) { DELAY(1000); - twsi_control_clear(sc, TWSI_CONTROL_IFLG); + /* There are two ways of clearing IFLAG. */ + if (sc->iflag_w1c) + twsi_control_set(sc, TWSI_CONTROL_IFLG); + else + twsi_control_clear(sc, TWSI_CONTROL_IFLG); DELAY(1000); } @@ -667,13 +671,11 @@ twsi_intr(void *arg) } debugf(sc->dev, "Refresh reg_control\n"); - /* - * Fix silicon bug on > Allwinner A20 by doing a read and writing - * again to the control register + /* + * Newer Allwinner chips clear IFLG after writing 1 to it. */ - status = TWSI_READ(sc, sc->reg_status); - TWSI_WRITE(sc, sc->reg_control, - sc->control_val | TWSI_CONTROL_IFLG); + TWSI_WRITE(sc, sc->reg_control, sc->control_val | + (sc->iflag_w1c ? TWSI_CONTROL_IFLG : 0)); debugf(sc->dev, "Done with interrupts\n\n"); if (transfer_done == 1) { Modified: head/sys/dev/iicbus/twsi/twsi.h ============================================================================== --- head/sys/dev/iicbus/twsi/twsi.h Mon Sep 7 06:29:41 2020 (r365396) +++ head/sys/dev/iicbus/twsi/twsi.h Mon Sep 7 06:32:03 2020 (r365397) @@ -66,6 +66,7 @@ struct twsi_softc { int error; uint32_t control_val; bool need_ack; + bool iflag_w1c; bus_size_t reg_data; bus_size_t reg_slave_addr;