From owner-cvs-all@FreeBSD.ORG Wed Apr 16 14:47:12 2008 Return-Path: Delivered-To: cvs-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 01BC5106566B; Wed, 16 Apr 2008 14:47:12 +0000 (UTC) (envelope-from jhb@freebsd.org) Received: from elvis.mu.org (elvis.mu.org [192.203.228.196]) by mx1.freebsd.org (Postfix) with ESMTP id E472D8FC26; Wed, 16 Apr 2008 14:47:11 +0000 (UTC) (envelope-from jhb@freebsd.org) Received: from zion.baldwin.cx (unknown [208.65.88.170]) by elvis.mu.org (Postfix) with ESMTP id 815061A4D7C; Wed, 16 Apr 2008 07:47:11 -0700 (PDT) From: John Baldwin To: Marcel Moolenaar Date: Wed, 16 Apr 2008 09:40:55 -0400 User-Agent: KMail/1.9.7 References: <200804142034.m3EKYjfs059229@repoman.freebsd.org> In-Reply-To: <200804142034.m3EKYjfs059229@repoman.freebsd.org> MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-15" Content-Transfer-Encoding: 7bit Content-Disposition: inline Message-Id: <200804160940.56271.jhb@freebsd.org> Cc: cvs-src@freebsd.org, src-committers@freebsd.org, cvs-all@freebsd.org Subject: Re: cvs commit: src/sys/ia64/ia64 sapic.c X-BeenThere: cvs-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: CVS commit messages for the entire tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 16 Apr 2008 14:47:12 -0000 On Monday 14 April 2008 04:34:45 pm Marcel Moolenaar wrote: > marcel 2008-04-14 20:34:45 UTC > > FreeBSD src repository > > Modified files: > sys/ia64/ia64 sapic.c > Log: > Revision 1.9 changes the delivery mode from the magic constant 0 > (i.e. fixed delivery) to SAPIC_DELMODE_LOWPRI. While the commit > log doesn't mention the change in behaviour, it is believed to be > deliberate. In the last 5.5 years this hasn't been a problem. Nor > do I think did it make any difference, but who knows. However, I > do know that it break SMP support for Montecito-based machines. > Switch back to fixed-CPU delivery so that SMP works again. This > gives me some time to look more closely at the problem, as well > as make sure the I-cache validation as it's implemented currently > is sufficient in SMP configurations... Intel is deprecating the LOWPRI delivery mode on x86 CPUs with x2APIC, so I think it is probably best to switch to using FIXED mode on ia64 as well (x86 has used fixed mode since the new APIC code came in due to LOWPRI being effectively useless on P4 CPUs). -- John Baldwin