Date: Sun, 16 Feb 2020 09:31:26 +0000 (UTC) From: Dmitry Marakasov <amdmi3@FreeBSD.org> To: ports-committers@freebsd.org, svn-ports-all@freebsd.org, svn-ports-head@freebsd.org Subject: svn commit: r526258 - head/cad/p5-Verilog-Perl Message-ID: <202002160931.01G9VQ6e001095@repo.freebsd.org>
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Author: amdmi3 Date: Sun Feb 16 09:31:26 2020 New Revision: 526258 URL: https://svnweb.freebsd.org/changeset/ports/526258 Log: - Fix LICENSE - Add LICENSE_FILE - Silence stripping - Update WWW Approved by: portmgr blanket Modified: head/cad/p5-Verilog-Perl/Makefile head/cad/p5-Verilog-Perl/pkg-descr Modified: head/cad/p5-Verilog-Perl/Makefile ============================================================================== --- head/cad/p5-Verilog-Perl/Makefile Sun Feb 16 09:20:49 2020 (r526257) +++ head/cad/p5-Verilog-Perl/Makefile Sun Feb 16 09:31:26 2020 (r526258) @@ -10,7 +10,9 @@ PKGNAMEPREFIX= p5- MAINTAINER= otacilio.neto@bsd.com.br COMMENT= Building point for Verilog support in the Perl language -LICENSE= LGPL3 +LICENSE= ART20 LGPL3 +LICENSE_COMB= dual +LICENSE_FILE_ART20= ${WRKSRC}/COPYING BUILD_DEPENDS= flex>=2.5.35:textproc/flex @@ -21,7 +23,7 @@ CONFIGURE_ENV= CXX=${CXX}\ CC=${CC} post-install: - ${STRIP_CMD} ${STAGEDIR}${PREFIX}/${SITE_ARCH_REL}/auto/Verilog/Parser/*.so - ${STRIP_CMD} ${STAGEDIR}${PREFIX}/${SITE_ARCH_REL}/auto/Verilog/Preproc/*.so + @${STRIP_CMD} ${STAGEDIR}${PREFIX}/${SITE_ARCH_REL}/auto/Verilog/Parser/*.so + @${STRIP_CMD} ${STAGEDIR}${PREFIX}/${SITE_ARCH_REL}/auto/Verilog/Preproc/*.so .include <bsd.port.mk> Modified: head/cad/p5-Verilog-Perl/pkg-descr ============================================================================== --- head/cad/p5-Verilog-Perl/pkg-descr Sun Feb 16 09:20:49 2020 (r526257) +++ head/cad/p5-Verilog-Perl/pkg-descr Sun Feb 16 09:31:26 2020 (r526258) @@ -16,4 +16,4 @@ language. It includes: edit this list, changing as many symbols as you wish. Vrename is then run a second time to apply the changes. -WWW: http://www.veripool.org/wiki/verilog-perl +WWW: https://www.veripool.org/wiki/verilog-perl
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