From owner-svn-src-all@FreeBSD.ORG Thu Apr 7 07:10:42 2011 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id DA3EB106564A; Thu, 7 Apr 2011 07:10:42 +0000 (UTC) (envelope-from np@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id B080D8FC14; Thu, 7 Apr 2011 07:10:42 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id p377Ag9I031955; Thu, 7 Apr 2011 07:10:42 GMT (envelope-from np@svn.freebsd.org) Received: (from np@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id p377Ag4k031952; Thu, 7 Apr 2011 07:10:42 GMT (envelope-from np@svn.freebsd.org) Message-Id: <201104070710.p377Ag4k031952@svn.freebsd.org> From: Navdeep Parhar Date: Thu, 7 Apr 2011 07:10:42 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r220410 - head/sys/dev/cxgbe X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 07 Apr 2011 07:10:42 -0000 Author: np Date: Thu Apr 7 07:10:42 2011 New Revision: 220410 URL: http://svn.freebsd.org/changeset/base/220410 Log: Modify read/write ioctls to work with 64 bit registers too. MFC after: 3 days Modified: head/sys/dev/cxgbe/t4_ioctl.h head/sys/dev/cxgbe/t4_main.c Modified: head/sys/dev/cxgbe/t4_ioctl.h ============================================================================== --- head/sys/dev/cxgbe/t4_ioctl.h Thu Apr 7 06:02:21 2011 (r220409) +++ head/sys/dev/cxgbe/t4_ioctl.h Thu Apr 7 07:10:42 2011 (r220410) @@ -35,24 +35,25 @@ * Ioctl commands specific to this driver. */ enum { - T4_GET32 = 0x40, /* read 32 bit register */ - T4_SET32, /* write 32 bit register */ + T4_GETREG = 0x40, /* read register */ + T4_SETREG, /* write register */ T4_REGDUMP, /* dump of all registers */ }; -struct t4_reg32 { +struct t4_reg { uint32_t addr; - uint32_t val; + uint32_t size; + uint64_t val; }; #define T4_REGDUMP_SIZE (160 * 1024) struct t4_regdump { - uint32_t version; - uint32_t len; /* bytes */ - uint8_t *data; + uint32_t version; + uint32_t len; /* bytes */ + uint32_t *data; }; -#define CHELSIO_T4_GETREG32 _IOWR('f', T4_GET32, struct t4_reg32) -#define CHELSIO_T4_SETREG32 _IOW('f', T4_SET32, struct t4_reg32) +#define CHELSIO_T4_GETREG _IOWR('f', T4_GETREG, struct t4_reg) +#define CHELSIO_T4_SETREG _IOW('f', T4_SETREG, struct t4_reg) #define CHELSIO_T4_REGDUMP _IOWR('f', T4_REGDUMP, struct t4_regdump) #endif Modified: head/sys/dev/cxgbe/t4_main.c ============================================================================== --- head/sys/dev/cxgbe/t4_main.c Thu Apr 7 06:02:21 2011 (r220409) +++ head/sys/dev/cxgbe/t4_main.c Thu Apr 7 07:10:42 2011 (r220410) @@ -2803,18 +2803,35 @@ t4_ioctl(struct cdev *dev, unsigned long return (rc); switch (cmd) { - case CHELSIO_T4_GETREG32: { - struct t4_reg32 *edata = (struct t4_reg32 *)data; + case CHELSIO_T4_GETREG: { + struct t4_reg *edata = (struct t4_reg *)data; + if ((edata->addr & 0x3) != 0 || edata->addr >= sc->mmio_len) return (EFAULT); - edata->val = t4_read_reg(sc, edata->addr); + + if (edata->size == 4) + edata->val = t4_read_reg(sc, edata->addr); + else if (edata->size == 8) + edata->val = t4_read_reg64(sc, edata->addr); + else + return (EINVAL); + break; } - case CHELSIO_T4_SETREG32: { - struct t4_reg32 *edata = (struct t4_reg32 *)data; + case CHELSIO_T4_SETREG: { + struct t4_reg *edata = (struct t4_reg *)data; + if ((edata->addr & 0x3) != 0 || edata->addr >= sc->mmio_len) return (EFAULT); - t4_write_reg(sc, edata->addr, edata->val); + + if (edata->size == 4) { + if (edata->val & 0xffffffff00000000) + return (EINVAL); + t4_write_reg(sc, edata->addr, (uint32_t) edata->val); + } else if (edata->size == 8) + t4_write_reg64(sc, edata->addr, edata->val); + else + return (EINVAL); break; } case CHELSIO_T4_REGDUMP: {