From owner-svn-src-head@freebsd.org Tue Oct 31 18:22:22 2017 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 7E2BFE60622; Tue, 31 Oct 2017 18:22:22 +0000 (UTC) (envelope-from andrew@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 4DB72843D4; Tue, 31 Oct 2017 18:22:22 +0000 (UTC) (envelope-from andrew@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v9VIMLMY042308; Tue, 31 Oct 2017 18:22:21 GMT (envelope-from andrew@FreeBSD.org) Received: (from andrew@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v9VIMLP6042293; Tue, 31 Oct 2017 18:22:21 GMT (envelope-from andrew@FreeBSD.org) Message-Id: <201710311822.v9VIMLP6042293@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: andrew set sender to andrew@FreeBSD.org using -f From: Andrew Turner Date: Tue, 31 Oct 2017 18:22:21 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r325242 - head/sys/arm64/arm64 X-SVN-Group: head X-SVN-Commit-Author: andrew X-SVN-Commit-Paths: head/sys/arm64/arm64 X-SVN-Commit-Revision: 325242 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 31 Oct 2017 18:22:22 -0000 Author: andrew Date: Tue Oct 31 18:22:21 2017 New Revision: 325242 URL: https://svnweb.freebsd.org/changeset/base/325242 Log: Use mp_maxid when iterating over CPUs as we may have sparse id allocations. Sponsored by: DARPA, AFRL Modified: head/sys/arm64/arm64/gicv3_its.c Modified: head/sys/arm64/arm64/gicv3_its.c ============================================================================== --- head/sys/arm64/arm64/gicv3_its.c Tue Oct 31 17:50:42 2017 (r325241) +++ head/sys/arm64/arm64/gicv3_its.c Tue Oct 31 18:22:21 2017 (r325242) @@ -557,7 +557,7 @@ gicv3_its_pendtables_init(struct gicv3_its_softc *sc) { int i; - for (i = 0; i < mp_ncpus; i++) { + for (i = 0; i <= mp_maxid; i++) { if (CPU_ISSET(i, &sc->sc_cpus) == 0) continue; @@ -736,7 +736,7 @@ gicv3_its_attach(device_t dev) gicv3_its_cmdq_init(sc); /* Allocate the per-CPU collections */ - for (int cpu = 0; cpu < mp_ncpus; cpu++) + for (int cpu = 0; cpu <= mp_maxid; cpu++) if (CPU_ISSET(cpu, &sc->sc_cpus) != 0) sc->sc_its_cols[cpu] = malloc( sizeof(*sc->sc_its_cols[0]), M_GICV3_ITS,