Date: Thu, 13 Apr 2006 01:34:17 GMT From: John-Mark Gurney <jmg@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 95129 for review Message-ID: <200604130134.k3D1YHE3049447@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=95129 Change 95129 by jmg@jmg_arlene on 2006/04/13 01:33:54 make compile.. drop cache stuff from pcibus since it's kinda pointless and we don't have code to fetch that info yet.. Affected files ... .. //depot/projects/kmacy_sun4v/src/sys/sparc64/pci/ofw_pcib.c#3 edit .. //depot/projects/kmacy_sun4v/src/sys/sparc64/pci/ofw_pcib_subr.c#4 edit .. //depot/projects/kmacy_sun4v/src/sys/sparc64/pci/ofw_pcibus.c#3 edit Differences ... ==== //depot/projects/kmacy_sun4v/src/sys/sparc64/pci/ofw_pcib.c#3 (text+ko) ==== @@ -87,9 +87,6 @@ /* ofw_bus interface */ DEVMETHOD(ofw_bus_get_node, ofw_pcib_gen_get_node), - /* ofw_pci interface */ - DEVMETHOD(ofw_pci_adjust_busrange, ofw_pcib_gen_adjust_busrange), - { 0, 0 } }; ==== //depot/projects/kmacy_sun4v/src/sys/sparc64/pci/ofw_pcib_subr.c#4 (text+ko) ==== @@ -52,7 +52,6 @@ ofw_pcib_gen_setup(device_t bridge) { struct ofw_pcib_gen_softc *sc; - u_int secbus; sc = device_get_softc(bridge); sc->ops_pcib_sc.dev = bridge; ==== //depot/projects/kmacy_sun4v/src/sys/sparc64/pci/ofw_pcibus.c#3 (text+ko) ==== @@ -46,7 +46,6 @@ #include <machine/bus.h> #include <machine/bus_common.h> -#include <machine/cache.h> #include <machine/iommureg.h> #include <machine/resource.h> @@ -123,7 +122,7 @@ static void ofw_pcibus_setup_device(device_t bridge, u_int busno, u_int slot, u_int func) { - u_int lat, clnsz; + u_int lat; /* * Initialize the latency timer register for busmaster devices to work @@ -147,18 +146,6 @@ } /* - * Compute a value to write into the cache line size register. - * The role of the streaming cache is unclear in write invalidate - * transfers, so it is made sure that it's line size is always reached. - */ - clnsz = max(cache.ec_linesize, STRBUF_LINESZ); - KASSERT((clnsz / STRBUF_LINESZ) * STRBUF_LINESZ == clnsz && - (clnsz / cache.ec_linesize) * cache.ec_linesize == clnsz && - (clnsz / 4) * 4 == clnsz, ("bogus cache line size %d", clnsz)); - PCIB_WRITE_CONFIG(bridge, busno, slot, func, PCIR_CACHELNSZ, - clnsz / 4, 1); - - /* * The preset in the intline register is usually wrong. Reset it to 255, * so that the PCI code will reroute the interrupt if needed. */
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