Date: Sat, 22 Jan 2011 16:09:44 GMT From: Adrian Chadd <adrian@FreeBSD.org> To: freebsd-gnats-submit@FreeBSD.org Subject: kern/154220: [ath] AR9280 based Ubiquiti SR71-12/15 panics on interface up (on mips) Message-ID: <201101221609.p0MG9in8046401@red.freebsd.org> Resent-Message-ID: <201101221610.p0MGAACc026889@freefall.freebsd.org>
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>Number: 154220 >Category: kern >Synopsis: [ath] AR9280 based Ubiquiti SR71-12/15 panics on interface up (on mips) >Confidential: no >Severity: non-critical >Priority: low >Responsible: freebsd-bugs >State: open >Quarter: >Keywords: >Date-Required: >Class: sw-bug >Submitter-Id: current-users >Arrival-Date: Sat Jan 22 16:10:10 UTC 2011 >Closed-Date: >Last-Modified: >Originator: Adrian Chadd >Release: FreeBSD-HEAD r217687 >Organization: >Environment: mipsbFreeBSD adrian-home-mips 9.0-CURRENT FreeBSD 9.0-CURRENT #13 r217691M: Sat Jan 22 01:04:38 WST 2011 adrian@pcbsd-3114:/data/freebsd/mips/head/obj/rspro_head/mips. mipseb/data/freebsd/mips/head/src/sys/RSPRO_STANDALONE mips >Description: The AR9220 is detected: ath0: <Atheros 9280> irq 0 at device 17.0 on pci0 ath0: AR9280 mac 128.2 RF5133 phy 13.0 But the mips kernel panics when the interface is brought up. >How-To-Repeat: # ifconfig wlan0 create wlandev ath0 # ifconfig wlan0 up >Fix: This was obtained from a linux ath9k patch: https://patchwork.kernel.org/patch/90926/ Some AR9220 parts require a tweak to the inivals based on the contents of the EEPROM. There's also a register which, at least at the reset time, generates a bus error when read. Here's how to fix it enough for testing: [adrian@pcbsd-3114]/data/freebsd/mips/head/src/sys/dev/ath/ath_hal(252)% svn diff . Index: ar5416/ar5416_reset.c =================================================================== --- ar5416/ar5416_reset.c (revision 217691) +++ ar5416/ar5416_reset.c (working copy) @@ -187,10 +187,12 @@ OS_MARK(ah, AH_MARK_RESET_LINE, __LINE__); +#if 0 HALDEBUG(ah, HAL_DEBUG_RESET, ">>>2 %s: AR_PHY_DAG_CTRLCCK=0x%x\n", __func__, OS_REG_READ(ah,AR_PHY_DAG_CTRLCCK)); HALDEBUG(ah, HAL_DEBUG_RESET, ">>>2 %s: AR_PHY_ADC_CTL=0x%x\n", __func__, OS_REG_READ(ah,AR_PHY_ADC_CTL)); +#endif /* Set the mute mask to the correct default */ if (AH_PRIVATE(ah)->ah_phyRev >= AR_PHY_CHIP_ID_REV_2) Index: ar9002/ar9280v2.ini =================================================================== --- ar9002/ar9280v2.ini (revision 217691) +++ ar9002/ar9280v2.ini (working copy) @@ -67,7 +67,11 @@ { 0x0000a274, 0x0a19c652, 0x0a19c652, 0x0a1aa652, 0x0a1aa652, 0x0a1aa652 }, { 0x0000a358, 0x7999aa02, 0x7999aa02, 0x7999aa0e, 0x7999aa0e, 0x7999aa0e }, { 0x0000a3d8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, +#if 0 { 0x00007894, 0x5a508000, 0x5a508000, 0x5a508000, 0x5a508000, 0x5a508000 }, +#else + { 0x00007894, 0x5a108000, 0x5a108000, 0x5a108000, 0x5a108000, 0x5a108000 }, +#endif }; The true fix is to read the relevant EEPROM value and make sure the right inivalue is written. That way multiple AR9220's of different types can be run on the same board. >Release-Note: >Audit-Trail: >Unformatted:
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