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Date:      Mon, 30 Aug 2010 14:11:40 +0300
From:      Alexander Motin <mav@FreeBSD.org>
To:        "YAMAMOTO, Taku" <taku@tackymt.homeip.net>
Cc:        freebsd-hackers@freebsd.org, FreeBSD-Current <freebsd-current@freebsd.org>
Subject:   Re: One-shot-oriented event timers management
Message-ID:  <4C7B91EC.5070906@FreeBSD.org>
In-Reply-To: <20100830195941.9731109c.taku@tackymt.homeip.net>
References:  <4C7A5C28.1090904@FreeBSD.org>	<20100830110932.23425932@ernst.jennejohn.org>	<4C7B82EA.2040104@FreeBSD.org> <20100830195941.9731109c.taku@tackymt.homeip.net>

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YAMAMOTO, Taku wrote:
> On Mon, 30 Aug 2010 13:07:38 +0300
> Alexander Motin <mav@FreeBSD.org> wrote:
>> Gary Jennejohn wrote:
> (snip)
>>> So, what else did you do to reduce interrupts so much?
>>>
>>> Ah, I think I see it now.  My desktop has only C1 enabled.  Is that it?
>>> Unfortunately, it appears that only C1 is supported :(
>> Yes, as I have said, at this moment empty ticks skipped only while CPU
>> is in C2/C3 states. In C1 state there is no way to handle lost events on
>> wake up. While it may be not very dangerous, it is not very good.
> 
> There's an alternative way to catch exit-from-C1 atomically:
> use MWAIT with bit0 of ECX set (``Treat masked interrupts as break events''
> in Intel 64 and IA-32 Architecthres Software Developer's Manual).
> 
> In this way we can put each core individually into deeper Cx state without
> additional costs (SMIs and the like) as a bonus.
> 
> The problem is that it may be unavailable to earlier CPUs that support
> MONITOR/MWAIT instructions:
> we should check the presense of this feature by examining bit0 and bit1 of ECX
> that is returned by CPUID 5.

Thank you for the hint. I will investigate it now. But it still help
only x86 systems. I have no idea how power management works on
arm/mips/ppc/..., but I assume that periodic wake up there also may be
not free.

-- 
Alexander Motin



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