From owner-svn-src-head@FreeBSD.ORG Fri Feb 28 02:38:04 2014 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 92678580; Fri, 28 Feb 2014 02:38:04 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id 7F58912CC; Fri, 28 Feb 2014 02:38:04 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.8/8.14.8) with ESMTP id s1S2c4Fd030047; Fri, 28 Feb 2014 02:38:04 GMT (envelope-from imp@svn.freebsd.org) Received: (from imp@localhost) by svn.freebsd.org (8.14.8/8.14.8/Submit) id s1S2c4Ol030046; Fri, 28 Feb 2014 02:38:04 GMT (envelope-from imp@svn.freebsd.org) Message-Id: <201402280238.s1S2c4Ol030046@svn.freebsd.org> From: Warner Losh Date: Fri, 28 Feb 2014 02:38:04 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r262597 - head/sys/dev/nand X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.17 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 28 Feb 2014 02:38:04 -0000 Author: imp Date: Fri Feb 28 02:38:04 2014 New Revision: 262597 URL: http://svnweb.freebsd.org/changeset/base/262597 Log: Add fdt binding for nand for Atmel parts. This does little more than match the device. Pinctrl will need to be added before this will work, in addition to migrating the current board_foo.c method of configuring these pins to something else. Non-FDT systems won't be affected, yet. Modified: head/sys/dev/nand/nfc_at91.c Modified: head/sys/dev/nand/nfc_at91.c ============================================================================== --- head/sys/dev/nand/nfc_at91.c Fri Feb 28 02:04:41 2014 (r262596) +++ head/sys/dev/nand/nfc_at91.c Fri Feb 28 02:38:04 2014 (r262597) @@ -32,6 +32,8 @@ * is on the board. */ +#include "opt_platform.h" + #include __FBSDID("$FreeBSD$"); @@ -57,6 +59,12 @@ __FBSDID("$FreeBSD$"); #include #include +#ifdef FDT +#include +#include +#include +#endif + /* * Data cycles are triggered by access to any address within the EBI CS3 region * that has A21 and A22 clear. Command cycles are any access with bit A21 @@ -108,7 +116,10 @@ dev_write_1(struct at91_nand_softc *sc, static int at91_nand_probe(device_t dev) { - +#ifdef FDT + if (!ofw_bus_is_compatible(dev, "atmel,at91rm9200-nand")) + return (ENXIO); +#endif device_set_desc(dev, "AT91 Integrated NAND controller"); return (BUS_PROBE_DEFAULT); } @@ -274,5 +285,9 @@ static driver_t at91_nand_driver = { }; static devclass_t at91_nand_devclass; -DRIVER_MODULE(at91_nand, atmelarm, at91_nand_driver, at91_nand_devclass, 0, 0); +#ifdef FDT +DRIVER_MODULE(at91_nand, simplebus, at91_nand_driver, at91_nand_devclass, 0, 0); +#else +DRIVER_MODULE(at91_nand, atmelarm, at91_nand_driver, at91_nand_devclass, 0, 0); +#endif