From owner-freebsd-current@FreeBSD.ORG Thu Jul 10 03:12:10 2003 Return-Path: Delivered-To: freebsd-current@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 52DA837B401 for ; Thu, 10 Jul 2003 03:12:10 -0700 (PDT) Received: from bluejay.mail.pas.earthlink.net (bluejay.mail.pas.earthlink.net [207.217.120.218]) by mx1.FreeBSD.org (Postfix) with ESMTP id B280F43F75 for ; Thu, 10 Jul 2003 03:12:09 -0700 (PDT) (envelope-from tlambert2@mindspring.com) Received: from user-2ivfjrs.dialup.mindspring.com ([165.247.207.124] helo=mindspring.com) by bluejay.mail.pas.earthlink.net with asmtp (SSLv3:RC4-MD5:128) (Exim 3.33 #1) id 19aYP7-0007YR-00; Thu, 10 Jul 2003 03:11:57 -0700 Message-ID: <3F0D3BAF.3A40E28D@mindspring.com> Date: Thu, 10 Jul 2003 03:10:55 -0700 From: Terry Lambert X-Mailer: Mozilla 4.79 [en] (Win98; U) X-Accept-Language: en MIME-Version: 1.0 To: Jens Rehsack References: <20030709123734.GA50458@nagual.pp.ru> <3F0C0ED6.4030202@liwing.de> <20030709150718.GC28375@Odin.AC.HMC.Edu><3F0C8F20.6040102@liwing.de> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-ELNK-Trace: b1a02af9316fbb217a47c185c03b154d40683398e744b8a4bcb5a3dcd796c1e42fd80f93b9eb939193caf27dac41a8fd350badd9bab72f9c350badd9bab72f9c cc: ache@nagual.pp.ru cc: freebsd-current@freebsd.org cc: "M. Warner Losh" cc: l.ertl@univie.ac.at Subject: Re: HTT on single CPU? X-BeenThere: freebsd-current@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: Discussions about the use of FreeBSD-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 10 Jul 2003 10:12:10 -0000 Jens Rehsack wrote: > How can I found out whether a board supports HTT or not? > I haven't seen it in none description I checked. Are some > chipsets (865, 875) always ready or is the bios programmer > the guy who must activate this feature? One non-obvious-at-first-glance thing that springs to mind is that for a single CPU board, you have to pick one with a support chipset that includes an IO APIC (minimally), since the SMP code require that you use APIC I/O. -- Terry