Date: Mon, 8 Aug 2022 04:43:36 GMT From: Ganbold Tsagaankhuu <ganbold@FreeBSD.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org Subject: git: 5db5bd5f3987 - main - Add drive strength setting for RK3568 pinctrl driver. Partially from https://reviews.freebsd.org/D36027 Message-ID: <202208080443.2784halm028670@gitrepo.freebsd.org>
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The branch main has been updated by ganbold: URL: https://cgit.FreeBSD.org/src/commit/?id=5db5bd5f39871facd0c633b7d1e98931eb57d442 commit 5db5bd5f39871facd0c633b7d1e98931eb57d442 Author: Ganbold Tsagaankhuu <ganbold@FreeBSD.org> AuthorDate: 2022-08-08 04:42:22 +0000 Commit: Ganbold Tsagaankhuu <ganbold@FreeBSD.org> CommitDate: 2022-08-08 04:42:22 +0000 Add drive strength setting for RK3568 pinctrl driver. Partially from https://reviews.freebsd.org/D36027 Submitted by: sos --- sys/arm64/rockchip/rk_pinctrl.c | 30 +++++++++++++++++++++++++----- 1 file changed, 25 insertions(+), 5 deletions(-) diff --git a/sys/arm64/rockchip/rk_pinctrl.c b/sys/arm64/rockchip/rk_pinctrl.c index ae633f052a21..6d0d93aee439 100644 --- a/sys/arm64/rockchip/rk_pinctrl.c +++ b/sys/arm64/rockchip/rk_pinctrl.c @@ -1171,11 +1171,31 @@ rk_pinctrl_configure_pin(struct rk_pinctrl_softc *sc, uint32_t *pindata) } /* Then drive strength */ - rv = rk_pinctrl_parse_drive(sc, pin_conf, bank, subbank, &drive, ®); - if (rv == 0) { - bit = (pin % 8) * 2; - mask = (0x3 << bit); - SYSCON_MODIFY_4(syscon, reg, mask, drive << bit | (mask << 16)); + if (ofw_bus_node_is_compatible(ofw_bus_get_node(sc->dev), + "rockchip,rk3568-pinctrl")) { + uint32_t value; + if (OF_getencprop(pin_conf, "drive-strength", &value, + sizeof(value)) == 0) { + if (bank) + reg = 0x01c0 + (bank * 0x40) + (pin / 2 * 4); + else + reg = 0x0070 + (pin / 2 * 4); + + drive = ((1 << (value + 1)) - 1) << (pin % 2); + + mask = 0x3f << (pin % 2);; + + SYSCON_WRITE_4(syscon, reg, drive | (mask << 16)); + } + } else { + rv = rk_pinctrl_parse_drive(sc, pin_conf, bank, subbank, &drive, + ®); + if (rv == 0) { + bit = (pin % 8) * 2; + mask = (0x3 << bit); + SYSCON_MODIFY_4(syscon, reg, mask, + drive << bit | (mask << 16)); + } } /* Finally set the pin function */
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