From owner-p4-projects@FreeBSD.ORG Wed Feb 20 18:31:35 2008 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id 33AA716A50B; Wed, 20 Feb 2008 18:31:35 +0000 (UTC) Delivered-To: perforce@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id ADEE816A400 for ; Wed, 20 Feb 2008 18:31:34 +0000 (UTC) (envelope-from rrs@cisco.com) Received: from repoman.freebsd.org (repoman.freebsd.org [IPv6:2001:4f8:fff6::29]) by mx1.freebsd.org (Postfix) with ESMTP id 91DE813C509 for ; Wed, 20 Feb 2008 18:31:34 +0000 (UTC) (envelope-from rrs@cisco.com) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.14.1/8.14.1) with ESMTP id m1KIVY30081482 for ; Wed, 20 Feb 2008 18:31:34 GMT (envelope-from rrs@cisco.com) Received: (from perforce@localhost) by repoman.freebsd.org (8.14.1/8.14.1/Submit) id m1KIVYMV081479 for perforce@freebsd.org; Wed, 20 Feb 2008 18:31:34 GMT (envelope-from rrs@cisco.com) Date: Wed, 20 Feb 2008 18:31:34 GMT Message-Id: <200802201831.m1KIVYMV081479@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to rrs@cisco.com using -f From: "Randall R. Stewart" To: Perforce Change Reviews Cc: Subject: PERFORCE change 135816 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 20 Feb 2008 18:31:35 -0000 http://perforce.freebsd.org/chv.cgi?CH=135816 Change 135816 by rrs@rrs-mips2-jnpr on 2008/02/20 18:31:08 kill rest of // Affected files ... .. //depot/projects/mips2-jnpr/src/sys/mips/mips32/octeon32/octeon_machdep.c#13 edit Differences ... ==== //depot/projects/mips2-jnpr/src/sys/mips/mips32/octeon32/octeon_machdep.c#13 (text+ko) ==== @@ -368,7 +368,7 @@ } /* Write the byte */ - //oct_write8(OCTEON_MIO_UART0_THR + (uart_index * 0x400), (uint64_t) ch); + /*oct_write8(OCTEON_MIO_UART0_THR + (uart_index * 0x400), (uint64_t) ch); */ oct_write64(OCTEON_MIO_UART0_THR + (uart_index * 0x400), (uint64_t) ch); /* Force Flush the IOBus */ @@ -391,7 +391,7 @@ } /* Write the byte */ - //oct_write8(OCTEON_MIO_UART0_THR, (uint64_t) ch); + /*oct_write8(OCTEON_MIO_UART0_THR, (uint64_t) ch); */ oct_write64(OCTEON_MIO_UART0_THR, (uint64_t) ch); /* Force Flush the IOBus */ @@ -554,7 +554,7 @@ return (ciu_intr_sum_reg_addr); } -// +/* */ #ifndef OCTEON_SMP static uint64_t ciu_get_intr_en_reg_addr(int core_num, int intx, int enx); @@ -575,7 +575,7 @@ -// +/* */ #else uint64_t ciu_get_en_reg_addr_new(int corenum, int intx, int enx, int ciu_ip); @@ -622,7 +622,7 @@ return (ciu_intr_reg_addr); } -// +/* */ #endif /* @@ -639,7 +639,7 @@ return (oct_read64(ciu_intr_sum_reg_addr)); } -// +/* */ #define DEBUG_CIU 1 #ifdef DEBUG_CIU @@ -761,7 +761,7 @@ if (core_num == CIU_THIS_CORE) { core_num = octeon_get_core_num(); } - // + /* */ #define DEBUG_CIU_EN 1 #ifdef DEBUG_CIU_EN