From owner-svn-src-head@freebsd.org Wed Jan 31 23:16:19 2018 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id D7AE6EC3113; Wed, 31 Jan 2018 23:16:19 +0000 (UTC) (envelope-from imp@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 8978A7E0D7; Wed, 31 Jan 2018 23:16:19 +0000 (UTC) (envelope-from imp@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 8020F2C6CE; Wed, 31 Jan 2018 23:16:19 +0000 (UTC) (envelope-from imp@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id w0VNGJ8L096944; Wed, 31 Jan 2018 23:16:19 GMT (envelope-from imp@FreeBSD.org) Received: (from imp@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id w0VNGJc4096943; Wed, 31 Jan 2018 23:16:19 GMT (envelope-from imp@FreeBSD.org) Message-Id: <201801312316.w0VNGJc4096943@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: imp set sender to imp@FreeBSD.org using -f From: Warner Losh Date: Wed, 31 Jan 2018 23:16:19 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r328645 - head/share/man/man7 X-SVN-Group: head X-SVN-Commit-Author: imp X-SVN-Commit-Paths: head/share/man/man7 X-SVN-Commit-Revision: 328645 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.25 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 31 Jan 2018 23:16:20 -0000 Author: imp Date: Wed Jan 31 23:16:19 2018 New Revision: 328645 URL: https://svnweb.freebsd.org/changeset/base/328645 Log: Add the new armv7 architecture. Modified: head/share/man/man7/arch.7 Modified: head/share/man/man7/arch.7 ============================================================================== --- head/share/man/man7/arch.7 Wed Jan 31 23:13:37 2018 (r328644) +++ head/share/man/man7/arch.7 Wed Jan 31 23:16:19 2018 (r328645) @@ -95,6 +95,7 @@ architectures, the final release. .It arm Ta 6.0 .It armeb Ta 8.0 .It armv6 Ta 10.0 +.It armv7 Ta 12.0 .It arm64 Ta 11.0 .It ia64 Ta 5.0 Ta 10.x .It i386 Ta 1.0 @@ -164,6 +165,8 @@ Examples are: .Dv arm64 currently does not support execution of .Dv armv6 +or +.Dv armv7 binaries, even if the CPU implements .Dv AArch32 execution state. @@ -220,6 +223,7 @@ is 8 bytes on all supported architectures except i386. .It arm Ta little Ta unsigned .It armeb Ta big Ta unsigned .It armv6 Ta little Ta unsigned +.It armv7 Ta little Ta unsigned .It arm64 Ta little Ta unsigned .It i386 Ta little Ta signed .It mips Ta big Ta signed @@ -245,6 +249,7 @@ is 8 bytes on all supported architectures except i386. .It arm Ta 4K .It armeb Ta 4K .It armv6 Ta 4K, 1M +.It armv7 Ta 4K, 1M .It arm64 Ta 4K, 2M, 1G .It i386 Ta 4K, 2M (PAE), 4M .It mips Ta 4K @@ -270,6 +275,7 @@ is 8 bytes on all supported architectures except i386. .It arm Ta soft Ta soft, double precision .It armeb Ta soft Ta soft, double precision .It armv6 Ta hard(1) Ta hard, double precision +.It armv7 Ta hard(1) Ta hard, double precision .It arm64 Ta hard Ta soft, quad precision .It i386 Ta hard Ta hard, 80 bit .It mips Ta soft Ta identical to double @@ -322,6 +328,7 @@ Architecture-specific macros: .It arm Ta Dv __arm__ .It armeb Ta Dv __arm__ .It armv6 Ta Dv __arm__, Dv __ARM_ARCH >= 6 +.It armv7 Ta Dv __arm__, Dv __ARM_ARCH >= 7 .It arm64 Ta Dv __aarch64__ .It i386 Ta Dv __i386__ .It mips Ta Dv __mips__, Dv __MIPSEB__, Dv __mips_o32