From owner-svn-src-all@freebsd.org Thu Jun 23 01:14:35 2016 Return-Path: Delivered-To: svn-src-all@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 0E8B2B72FA1; Thu, 23 Jun 2016 01:14:35 +0000 (UTC) (envelope-from adrian@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id DF8CD2D48; Thu, 23 Jun 2016 01:14:34 +0000 (UTC) (envelope-from adrian@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id u5N1EYdN084135; Thu, 23 Jun 2016 01:14:34 GMT (envelope-from adrian@FreeBSD.org) Received: (from adrian@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id u5N1EXLP084132; Thu, 23 Jun 2016 01:14:33 GMT (envelope-from adrian@FreeBSD.org) Message-Id: <201606230114.u5N1EXLP084132@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: adrian set sender to adrian@FreeBSD.org using -f From: Adrian Chadd Date: Thu, 23 Jun 2016 01:14:33 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r302105 - in head/sys/dev/bhnd: . bcma bhndb X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 23 Jun 2016 01:14:35 -0000 Author: adrian Date: Thu Jun 23 01:14:33 2016 New Revision: 302105 URL: https://svnweb.freebsd.org/changeset/base/302105 Log: [BHND/bcma] Add implementation of BHND_BUS_RESET_CORE function for BCMA This patch addes missing implementation of BHND_BUS_RESET_CORE function for BCMA. The reset procedure is very simple: enable reset mode, stop clocking, enable clocking & force clock gating, disable reset mode, stop clock gating. Tested: * (michael) Tested on ASUS RT-N53 for enabling/reset USB core Submitted by: Michael Zhilin Approved by: re (gjb) Modified: head/sys/dev/bhnd/bcma/bcma.c head/sys/dev/bhnd/bhnd_core.h head/sys/dev/bhnd/bhndb/bhndb.c Modified: head/sys/dev/bhnd/bcma/bcma.c ============================================================================== --- head/sys/dev/bhnd/bcma/bcma.c Thu Jun 23 01:13:30 2016 (r302104) +++ head/sys/dev/bhnd/bcma/bcma.c Thu Jun 23 01:14:33 2016 (r302105) @@ -43,6 +43,7 @@ __FBSDID("$FreeBSD$"); #include "bcma_eromreg.h" #include "bcma_eromvar.h" +#include int bcma_probe(device_t dev) @@ -218,9 +219,33 @@ bcma_reset_core(device_t dev, device_t c if (dinfo->res_agent == NULL) return (ENODEV); - // TODO - perform reset + /* Start reset */ + bhnd_bus_write_4(dinfo->res_agent, BHND_RESET_CF, BHND_RESET_CF_ENABLE); + bhnd_bus_read_4(dinfo->res_agent, BHND_RESET_CF); + DELAY(10); + + /* Disable clock */ + bhnd_bus_write_4(dinfo->res_agent, BHND_CF, flags); + bhnd_bus_read_4(dinfo->res_agent, BHND_CF); + DELAY(10); + + /* Enable clocks & force clock gating */ + bhnd_bus_write_4(dinfo->res_agent, BHND_CF, BHND_CF_CLOCK_EN | + BHND_CF_FGC | flags); + bhnd_bus_read_4(dinfo->res_agent, BHND_CF); + DELAY(10); + + /* Complete reset */ + bhnd_bus_write_4(dinfo->res_agent, BHND_RESET_CF, 0); + bhnd_bus_read_4(dinfo->res_agent, BHND_RESET_CF); + DELAY(10); + + /* Release force clock gating */ + bhnd_bus_write_4(dinfo->res_agent, BHND_CF, BHND_CF_CLOCK_EN | flags); + bhnd_bus_read_4(dinfo->res_agent, BHND_CF); + DELAY(10); - return (ENXIO); + return (0); } static int Modified: head/sys/dev/bhnd/bhnd_core.h ============================================================================== --- head/sys/dev/bhnd/bhnd_core.h Thu Jun 23 01:13:30 2016 (r302104) +++ head/sys/dev/bhnd/bhnd_core.h Thu Jun 23 01:14:33 2016 (r302105) @@ -25,19 +25,27 @@ #define _BHND_BHND_CORE_H_ /* Common core control flags */ -#define BHND_CF_BIST_EN 0x8000 /**< ??? */ +#define BHND_CF 0x0408 +#define BHND_CF_BIST_EN 0x8000 /**< built-in self test */ #define BHND_CF_PME_EN 0x4000 /**< ??? */ #define BHND_CF_CORE_BITS 0x3ffc /**< core specific flag mask */ #define BHND_CF_FGC 0x0002 /**< force clock gating */ #define BHND_CF_CLOCK_EN 0x0001 /**< enable clock */ /* Common core status flags */ +#define BHND_SF 0x0500 #define BHND_SF_BIST_DONE 0x8000 /**< ??? */ #define BHND_SF_BIST_ERROR 0x4000 /**< ??? */ #define BHND_SF_GATED_CLK 0x2000 /**< clock gated */ #define BHND_SF_DMA64 0x1000 /**< supports 64-bit DMA */ #define BHND_SF_CORE_BITS 0x0fff /**< core-specific status mask */ +/*Reset core control flags */ +#define BHND_RESET_CF 0x0800 +#define BHND_RESET_CF_ENABLE 0x0001 + +#define BHND_RESET_SF 0x0804 + /* * A register that is common to all cores to * communicate w/PMU regarding clock control. Modified: head/sys/dev/bhnd/bhndb/bhndb.c ============================================================================== --- head/sys/dev/bhnd/bhndb/bhndb.c Thu Jun 23 01:13:30 2016 (r302104) +++ head/sys/dev/bhnd/bhndb/bhndb.c Thu Jun 23 01:14:33 2016 (r302105) @@ -62,7 +62,7 @@ __FBSDID("$FreeBSD$"); #include "bhndb_private.h" /* Debugging flags */ -static u_long bhndb_debug = 0; +static u_long bhndb_debug = -1; TUNABLE_ULONG("hw.bhndb.debug", &bhndb_debug); enum { @@ -596,8 +596,10 @@ bhndb_generic_init_full_config(device_t hostb = NULL; /* Fetch the full set of bhnd-attached cores */ - if ((error = device_get_children(sc->bus_dev, &devs, &ndevs))) + if ((error = device_get_children(sc->bus_dev, &devs, &ndevs))) { + device_printf(sc->dev, "unable to get children\n"); return (error); + } /* Find our host bridge device */ hostb = BHNDB_FIND_HOSTB_DEVICE(dev, child);