From owner-cvs-all Tue Mar 12 19:43: 3 2002 Delivered-To: cvs-all@freebsd.org Received: from freefall.freebsd.org (freefall.FreeBSD.org [216.136.204.21]) by hub.freebsd.org (Postfix) with ESMTP id C036437B419; Tue, 12 Mar 2002 19:43:00 -0800 (PST) Received: (from jake@localhost) by freefall.freebsd.org (8.11.6/8.11.6) id g2D3h0T72674; Tue, 12 Mar 2002 19:43:00 -0800 (PST) (envelope-from jake) Message-Id: <200203130343.g2D3h0T72674@freefall.freebsd.org> From: Jake Burkholder Date: Tue, 12 Mar 2002 19:43:00 -0800 (PST) To: cvs-committers@FreeBSD.org, cvs-all@FreeBSD.org Subject: cvs commit: src/sys/sparc64/include smp.h src/sys/sparc64/sparc64 genassym.c mp_exception.s X-FreeBSD-CVS-Branch: HEAD Sender: owner-cvs-all@FreeBSD.ORG Precedence: bulk List-ID: List-Archive: (Web Archive) List-Help: (List Instructions) List-Subscribe: List-Unsubscribe: X-Loop: FreeBSD.ORG jake 2002/03/12 19:43:00 PST Modified files: sys/sparc64/include smp.h sys/sparc64/sparc64 genassym.c mp_exception.s Log: Make IPI_WAIT use a bit mask of the cpus that a pmap is active on and only wait for those cpus, instead of all of them by using a count. Oops. Make the pointer to the mask that the primary cpu spins on volatile, so gcc doesn't optimize out an important load. Oops again. Activate tlb shootdown ipi synchronization now that it works. We have all involved cpus wait until all the others are done. This may not be necessary, it is mostly for sanity. Make the trigger level interrupt ipi handler work. Submitted by: tmm Revision Changes Path 1.9 +12 -18 src/sys/sparc64/include/smp.h 1.28 +2 -5 src/sys/sparc64/sparc64/genassym.c 1.3 +18 -10 src/sys/sparc64/sparc64/mp_exception.s To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe cvs-all" in the body of the message