Date: Fri, 2 Aug 2013 19:58:36 +0300 From: Konstantin Belousov <kostikbel@gmail.com> To: Ian Lepore <ian@FreeBSD.org> Cc: freebsd-arch@FreeBSD.org, Sorav Bansal <sbansal@cse.iitd.ernet.in>, Piyus Kedia <piyuskedia@gmail.com> Subject: Re: Fwd: Use of the PC value in interrupt/exception handlers Message-ID: <20130802165836.GC4972@kib.kiev.ua> In-Reply-To: <1375457493.45247.249.camel@revolution.hippie.lan> References: <CA%2BmWYFvbcRc=Hh1B2OFvadkJWFmwCXF-%2BBF2zzk7ZeO8YF=B9A@mail.gmail.com> <CAFqkpAY1yBrHfutanF=h7Ke=jVCV95Rzg397okhKw6JYQ_PgUA@mail.gmail.com> <1375457493.45247.249.camel@revolution.hippie.lan>
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--c/lwuELUGxxkaMpf Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Fri, Aug 02, 2013 at 09:31:33AM -0600, Ian Lepore wrote: > On Fri, 2013-08-02 at 19:08 +0900, Piyus Kedia wrote: > > Dear all, > >=20 > > We are working on developing a dynamic binary translator for the kernel. > > Towards this, we wanted to confirm if the interrupted PC value pushed on > > stack by an interrupt/exception is used by the interrupt/exception > > handlers? For example, is the PC value compared against a fixed address= to > > determine the handler behaviour (like > > Linux's page fault handler compares the faulting PC against an exception > > table, to allow functions like copy_from_user to fault). > >=20 > > Basically, we are wondering if it is safe to replace the pushed PC valu= e on > > stack by another value. This would be safe if the PC value is only used= for > > returning from interrupt, or for reading contents at that PC address (e= =2Eg., > > to decode the instruction at current PC). It would be unsafe if the val= ue > > of the address itself is meaningful to the handler. > >=20 > > We found that in FreeBSD segment-not-present exception handler checks t= he > > trapped PC value against some fixed kernel PC by looking at the code, > > except that it is only used for debugging purposes. It would be nice if > > somebody could also confirm this. > >=20 > > Thanks, > > Piyus >=20 > For the ARM architectures which use Restartable Atomic Sequences (RAS) > to implement atomic operations, examining the value of the saved PC and > possibly modifying it is how RAS works. See the PUSHFRAMEINSVC macro in > sys/arm/include/asmacros.h. =20 >=20 > In a nutshell, the RAS code works by having userland code store the > begin/end addresses of a small block of code that must be executed to > completion without interruption to be correct. If an exception or > interrupt happens while the PC is in that range, the exception-entry > code implemented by PUSHFRAMEINSVC modifies the saved PC so that on > return to userland, execution resumes at the beginning of the atomic > sequence. This reminds of me the following MIPS code: http://svnweb.freebsd.org/base?view=3Drevision&revision=3D226517 --c/lwuELUGxxkaMpf Content-Type: application/pgp-signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.20 (FreeBSD) iQIcBAEBAgAGBQJR++U8AAoJEJDCuSvBvK1BfG4P/1k47DWq0o1wSy3K0+9ri0g3 388Q1phR8IdJGDVTrf5ZzbuQi0tNL3Knyu9hL3deMG/1LXWByojOVxffycLwYCJo K+8Wie47QJO9ZFN6mks0NN7Q3NBeXC07RIN7ShPg+bTEUIzNbsytG+WlMNAqddis NP9l/XEYWHlXZNOGzuQhk9IrXKqI1w+9IY0xYOzpnre9YSHeVGDyzuhroX0xKXpP l5wbki2VKBncXb/4lpSNoQP50UgxiQgZqjsuQG9LTa1PhwyxJBjiVcjwFkDjs1Od pcKJdOnbjKzfQP+BDwS2x6v9Wl6ikxixIJ0WS9Eb6RuhiwRX8kpYGBdhlJ7Qms3f U4L+xYZriycnozUh4b3vzVfU7WwT4OBJysT7plqzMbfUNPa3N5lUgQj66SGjH0KY eV1BKsw1MPIIszAWRZ6vm4Ryri5rqvpj3/WiWoh2w6LizCNFQVhHmfnHaepYoNyx bfuUKVOdLgSZl7B7jcYygrybPFauakFTD7BbJhYObWZlXHCTirhK/8qRZAE3bhgq nuREPzE4x1s8elWvZIyy+jrwFseQvAcuYUnumXy0knylwfJ76qszfmUZ4BtVxVT7 fr8TDjNz9npVu7K4dN5K8hFg9D96pQqvfNsj7qJIc3/Rh4YP6FezxNZza/5h6HDx 42+ZbLht+U9okAeMkICO =EBhZ -----END PGP SIGNATURE----- --c/lwuELUGxxkaMpf--
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