From owner-freebsd-hackers Sun Aug 5 12:18: 5 2001 Delivered-To: freebsd-hackers@freebsd.org Received: from wall.polstra.com (rtrwan160.accessone.com [206.213.115.74]) by hub.freebsd.org (Postfix) with ESMTP id 865BD37B401 for ; Sun, 5 Aug 2001 12:17:58 -0700 (PDT) (envelope-from jdp@wall.polstra.com) Received: from vashon.polstra.com (vashon.polstra.com [206.213.73.13]) by wall.polstra.com (8.11.3/8.11.3) with ESMTP id f75JHqX06017; Sun, 5 Aug 2001 12:17:52 -0700 (PDT) (envelope-from jdp@wall.polstra.com) Received: (from jdp@localhost) by vashon.polstra.com (8.11.3/8.11.0) id f75JHqn34961; Sun, 5 Aug 2001 12:17:52 -0700 (PDT) (envelope-from jdp) Date: Sun, 5 Aug 2001 12:17:52 -0700 (PDT) Message-Id: <200108051917.f75JHqn34961@vashon.polstra.com> To: hackers@freebsd.org From: John Polstra Cc: dillon@earth.backplane.com Subject: Re: Page Coloring In-Reply-To: <200108051913.f75JDir81853@earth.backplane.com> References: <200108030347.f733lIC01436@mass.dis.org> <200108051750.f75Hoce34726@vashon.polstra.com> <200108051913.f75JDir81853@earth.backplane.com> Organization: Polstra & Co., Seattle, WA Sender: owner-freebsd-hackers@FreeBSD.ORG Precedence: bulk List-ID: List-Archive: (Web Archive) List-Help: (List Instructions) List-Subscribe: List-Unsubscribe: X-Loop: FreeBSD.ORG In article <200108051913.f75JDir81853@earth.backplane.com>, Matt Dillon wrote: > :In article <200108030347.f733lIC01436@mass.dis.org>, > :Mike Smith wrote: > :> > :> It looks about right, but page colouring is pointless unless and until we > :> can determine the processor cache characteristics at runtime. > :> > :> Which we can't. > : > :Why can't we do this at least on the i386 with the CPUID instruction, > :initial %eax == 2? It returns cache size, associativity, and line > :size for both the L1 and L2 caches. As far as I can tell, it works > :for the Pentium Pro and subsequent processors. > : > :John > :-- > : John Polstra jdp@polstra.com > > Well, first of all the page coloring is not pointless with the > sizes hardwired. The cache characteristics do not have to > match exactly for page coloring to work. The effectiveness is > like a log-graph, and you don't lose a lot by guessing wrong. > Once you get past a designated cache size of 4-pages or so you've > already reaped 90% of the benefit on systems which use N-way (2, 4, 8) > associative caches (which is most systems these days). For systems with > direct-mapped caches you reap 90% of the benefits once you get past > 16 pages or so. > > Since most L1 caches these days are at least 16K and most L2 caches > these days are at least 64K (and often much higher, such as on the IA32), > our hardwired page coloring constants wind up being about 95% effective > across the entire range of chips our OS currently runs on. Yes, I understand that. I'm just trying to find out why Mike keeps saying we cannot determine the processor cache characteristics at runtime. John -- John Polstra jdp@polstra.com John D. Polstra & Co., Inc. Seattle, Washington USA "Disappointment is a good sign of basic intelligence." -- Chögyam Trungpa To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-hackers" in the body of the message