Date: Tue, 1 Oct 2013 12:50:49 +0200 From: Bernd Walter <ticso@cicely7.cicely.de> To: Thomas Skibo <ThomasSkibo@sbcglobal.net> Cc: freebsd-arm@freebsd.org, bernd@bwct.de Subject: Re: Own PL code on ZedBoard Message-ID: <20131001105049.GD8746@cicely7.cicely.de> In-Reply-To: <5249B73C.8000907@sbcglobal.net> References: <20130927231143.GF82284@cicely7.cicely.de> <5249B73C.8000907@sbcglobal.net>
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On Mon, Sep 30, 2013 at 10:39:08AM -0700, Thomas Skibo wrote: > > > > >Did anyone already setup own logic on ZedBoard with FreeBSD? > >Where do I need to place my bitstream to have the FPGA part configured > >at boot? > >Can I change PL configuration at runtime, or does FreeBSD require > >some preconfigured logic to work. > >I have expirience with Xilinx FPGA, but this is first time with Zynq. > > > >-- > >B.Walter <bernd at bwct.de> http://www.bwct.de > >Modbus/TCP Ethernet I/O Baugruppen, ARM basierte FreeBSD Rechner uvm. > > FreeBSD doesn't require the PL to be programmed. The PL can be > programmed any time using the devcfg(4) driver. But if you need > something in the PL at initialization time, a bitstream can be included > in BOOT.BIN which is generated using Xilinx tools. > > Another option would be to create an rc script that programs the PL at > boot-up using the method described in devcfg(4) man page. That's perfect. I'm targeting two things. One is using the board for fast IO with different kind of FMC/PMOD moduls varying purpose. In this case a fixed PL configuration would be problematic as it makes tests harder and loading special support from shell is much easier. The other one is the parallella system, which is also based on Zynq. -- B.Walter <bernd@bwct.de> http://www.bwct.de Modbus/TCP Ethernet I/O Baugruppen, ARM basierte FreeBSD Rechner uvm.
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