From owner-freebsd-stable@FreeBSD.ORG Sun Jun 8 12:06:55 2008 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id D16151065677; Sun, 8 Jun 2008 12:06:55 +0000 (UTC) (envelope-from jdc@parodius.com) Received: from mx01.sc1.parodius.com (mx01.sc1.parodius.com [72.20.106.3]) by mx1.freebsd.org (Postfix) with ESMTP id A31BC8FC20; Sun, 8 Jun 2008 12:06:55 +0000 (UTC) (envelope-from jdc@parodius.com) Received: by mx01.sc1.parodius.com (Postfix, from userid 1000) id B47F41CC031; Sun, 8 Jun 2008 05:06:55 -0700 (PDT) Date: Sun, 8 Jun 2008 05:06:55 -0700 From: Jeremy Chadwick To: Evren Yurtesen Message-ID: <20080608120655.GA50122@eos.sc1.parodius.com> References: <4847072E.5000709@ispro.net> <484713B2.5030200@ispro.net> <48471834.30905@modulus.org> <200806051040.28319.jhb@freebsd.org> <484AA07A.2010308@ispro.net> <20080607164812.GA11072@eos.sc1.parodius.com> <484AEA18.4030901@ispro.net> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <484AEA18.4030901@ispro.net> User-Agent: Mutt/1.5.17 (2007-11-01) Cc: freebsd-stable@freebsd.org, John Baldwin , Andrew Snow Subject: Re: cpufreq broken on core2duo X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 08 Jun 2008 12:06:55 -0000 On Sat, Jun 07, 2008 at 11:05:44PM +0300, Evren Yurtesen wrote: > I have tested if it is working or not without using powerd. However you are > right, SpeedStep in bios seem to be adding some ACPI support which looks > like kind of broken. > > In either case, I get error when I have HTT as powerd (powerd -v) is only > able to change 1 CPUs speed (obviously). Perhaps this can be fixed in > future hopefully. I believe you can only adjust the clock frequency of both CPUs/cores on Intel platforms. At least that's how it is under Windows, and under PC BIOSes. If you have a CPU that has dual cores, both cores will have their frequency adjusted. If you have dual physical CPUs that have dual cores, any frequency adjustment should apply to all CPUs. > In the bios, there is also Enhanced C1 support which seems to be reducing > the vcore voltage at the same clock speed. (is this normal even?) Enhanced C1 support allows the CPU to go into a deeper sleep state during idle periods. I recommend enabling it, even on server systems. You can safely enable it on systems using FreeBSD. You might be interested in the utility for Windows called RMClock, which provides an incredible amount of low-level information about CPUs and chipsets. Yes, I know it's for Windows, but if you ever boot Windows, it's a fantastic utility. > This is the motherboard (information from the datacenter): > http://www.supermicro.com/products/motherboard/PD/E7230/PDSML-LN2.cfm > Although kenv | grep smbios show PDSBM can this be or the datacenter is wrong? I can add support for this motherboard to bsdhwmon(8), assuming you can get me a few pieces of information. (Edit: Actually, seems you've already contacted me with this information! Thanks!) I'll need to contact Supermicro to get Winbond interface details, however. That can take a couple weeks. > I just went to bios and says 1.264v so I guess it is safe to assume that > mbmon was showing double. mbmon is showing you invalid values. The fact that it's a value that happens to be double in value is pure chance. mbmon is not properly working with your motherboard. It's that simple. :-) -- | Jeremy Chadwick jdc at parodius.com | | Parodius Networking http://www.parodius.com/ | | UNIX Systems Administrator Mountain View, CA, USA | | Making life hard for others since 1977. PGP: 4BD6C0CB |