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From: Adrian Chadd <adrian@FreeBSD.org>
Date: Thu, 27 Jan 2011 02:56:04 +0000 (UTC)
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Subject: svn commit: r217921 - head/sys/dev/ath/ath_hal
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Author: adrian
Date: Thu Jan 27 02:56:03 2011
New Revision: 217921
URL: http://svn.freebsd.org/changeset/base/217921

Log:
  Writing to the analog registers on the AR9220 (Merlin PCI) seems to require a delay.
  
  This, along with an initval change which will appear in a subsequent commit,
  fixes bus panics that I have been seing with the AR9220 on a Routerstation Pro
  (AR7161 MIPS board.)
  
  Obtained from: Linux ath9k
  PR: kern/154220

Modified:
  head/sys/dev/ath/ath_hal/ah.c

Modified: head/sys/dev/ath/ath_hal/ah.c
==============================================================================
--- head/sys/dev/ath/ath_hal/ah.c	Thu Jan 27 02:27:17 2011	(r217920)
+++ head/sys/dev/ath/ath_hal/ah.c	Thu Jan 27 02:56:03 2011	(r217921)
@@ -858,6 +858,11 @@ ath_hal_ini_write(struct ath_hal *ah, co
 	for (r = 0; r < ia->rows; r++) {
 		OS_REG_WRITE(ah, HAL_INI_VAL(ia, r, 0),
 		    HAL_INI_VAL(ia, r, col));
+
+		/* Analog shift register delay seems needed for Merlin - PR kern/154220 */
+		if (HAL_INI_VAL(ia, r, 0) >= 0x7800 && HAL_INI_VAL(ia, r, 0) < 0x78a0)
+			OS_DELAY(100);
+
 		DMA_YIELD(regWr);
 	}
 	return regWr;
@@ -881,6 +886,10 @@ ath_hal_ini_bank_write(struct ath_hal *a
 
 	for (r = 0; r < ia->rows; r++) {
 		OS_REG_WRITE(ah, HAL_INI_VAL(ia, r, 0), data[r]);
+
+		/* Analog shift register delay seems needed for Merlin - PR kern/154220 */
+		if (HAL_INI_VAL(ia, r, 0) >= 0x7800 && HAL_INI_VAL(ia, r, 0) < 0x78a0)
+			OS_DELAY(100);
 		DMA_YIELD(regWr);
 	}
 	return regWr;