Date: Fri, 18 Feb 2000 17:02:14 -0800 From: Arun Sharma <adsharma@sharmas.dhs.org> To: Matthew Dillon <dillon@apollo.backplane.com> Cc: freebsd-hackers@FreeBSD.ORG Subject: Re: 64bit OS? Message-ID: <20000218170214.D18203@sharmas.dhs.org> In-Reply-To: <200002190006.QAA82061@apollo.backplane.com>; from Matthew Dillon on Fri, Feb 18, 2000 at 04:06:55PM -0800 References: <20000218150219.A17763@sharmas.dhs.org> <200002190006.QAA82061@apollo.backplane.com>
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On Fri, Feb 18, 2000 at 04:06:55PM -0800, Matthew Dillon wrote: > If I understand the hardware hash table method correctly, then > I think the absolute best choice for FreeBSD is to use that method > as it will allow us to get rid of the scaleability problems we have > with the pv_entry_t scheme we use for IA32. The number of pv_entry_t's > in an IA64 architecture wind up being fixed. How big can we make the > hardware-assisted hash table? Smaller than 2**64. Minimum is 2**15. > > Also, a hash table scheme is a much better fit for a 64 bit address > space model, especially with sparse mappings. The MIPS R4K and later > all use a hash table scheme and it seems to work well for them. > Madhu Talluri's paper on page tables for 64 bit address spaces claims that having collision chains is expensive - for 8 bytes of mapping information, the pointer and tag storage overhead is 16 bytes. Though page table space is important, in the age of big memory computers, I think performance and manageability are more important. -Arun To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-hackers" in the body of the message
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