From owner-p4-projects@FreeBSD.ORG Sat Oct 4 00:56:10 2008 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id 0B6F11065690; Sat, 4 Oct 2008 00:56:10 +0000 (UTC) Delivered-To: perforce@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id C3290106568E for ; Sat, 4 Oct 2008 00:56:09 +0000 (UTC) (envelope-from nwhitehorn@freebsd.org) Received: from repoman.freebsd.org (repoman.freebsd.org [IPv6:2001:4f8:fff6::29]) by mx1.freebsd.org (Postfix) with ESMTP id B0B338FC15 for ; Sat, 4 Oct 2008 00:56:09 +0000 (UTC) (envelope-from nwhitehorn@freebsd.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.14.3/8.14.3) with ESMTP id m940u9aL022830 for ; Sat, 4 Oct 2008 00:56:09 GMT (envelope-from nwhitehorn@freebsd.org) Received: (from perforce@localhost) by repoman.freebsd.org (8.14.3/8.14.3/Submit) id m940u95O022828 for perforce@freebsd.org; Sat, 4 Oct 2008 00:56:09 GMT (envelope-from nwhitehorn@freebsd.org) Date: Sat, 4 Oct 2008 00:56:09 GMT Message-Id: <200810040056.m940u95O022828@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to nwhitehorn@freebsd.org using -f From: Nathan Whitehorn To: Perforce Change Reviews Cc: Subject: PERFORCE change 150917 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 04 Oct 2008 00:56:10 -0000 http://perforce.freebsd.org/chv.cgi?CH=150917 Change 150917 by nwhitehorn@nwhitehorn_trantor on 2008/10/04 00:55:52 Change mmu_oea64 to pass around vsids instead of srs. This is in preparation for a future 64-bit port. Affected files ... .. //depot/projects/ppc-g5/sys/powerpc/aim/mmu_oea64.c#5 edit Differences ... ==== //depot/projects/ppc-g5/sys/powerpc/aim/mmu_oea64.c#5 (text+ko) ==== @@ -166,10 +166,10 @@ return b; } -static __inline int -va_to_sr(u_int *sr, vm_offset_t va) +static __inline uint64_t +va_to_vsid(pmap_t pm, vm_offset_t va) { - return (sr[(uintptr_t)va >> ADDR_SR_SHFT]); + return ((pm->pm_sr[(uintptr_t)va >> ADDR_SR_SHFT]) & SR_VSID_MASK); } #define TLBSYNC() __asm __volatile("tlbsync; ptesync"); @@ -201,8 +201,7 @@ vpn = (uint64_t)(va & ADDR_PIDX); if (pmap != NULL) - vpn |= ((uint64_t)(va_to_sr(pmap->pm_sr,va) & SR_VSID_MASK) - << 28); + vpn |= (va_to_vsid(pmap,va) << 28); #else vpn = va; #endif @@ -466,11 +465,11 @@ MMU_DEF(oea64_bridge_mmu); static __inline u_int -va_to_pteg(u_int sr, vm_offset_t addr) +va_to_pteg(uint64_t vsid, vm_offset_t addr) { u_int hash; - hash = (sr & SR_VSID_MASK) ^ (((u_int)addr & ADDR_PIDX) >> + hash = vsid ^ (((uint64_t)addr & ADDR_PIDX) >> ADDR_PIDX_SHFT); return (hash & moea64_pteg_mask); } @@ -531,15 +530,16 @@ } static __inline int -moea64_pte_match(struct lpte *pt, u_int sr, vm_offset_t va, int which) +moea64_pte_match(struct lpte *pt, uint64_t vsid, vm_offset_t va, int which) { return (pt->pte_hi & ~LPTE_VALID) == - (((uint64_t)(sr & SR_VSID_MASK) << LPTE_VSID_SHIFT) | + ((vsid << LPTE_VSID_SHIFT) | ((uint64_t)(va >> ADDR_API_SHFT64) & LPTE_API) | which); } static __inline void -moea64_pte_create(struct lpte *pt, u_int sr, vm_offset_t va, uint64_t pte_lo) +moea64_pte_create(struct lpte *pt, uint64_t vsid, vm_offset_t va, + uint64_t pte_lo) { ASSERT_TABLE_LOCK(); @@ -549,7 +549,7 @@ * * Note: Don't set the valid bit for correct operation of tlb update. */ - pt->pte_hi = ((uint64_t)(sr & SR_VSID_MASK) << LPTE_VSID_SHIFT) | + pt->pte_hi = (vsid << LPTE_VSID_SHIFT) | (((uint64_t)(va & ADDR_PIDX) >> ADDR_API_SHFT64) & LPTE_API); pt->pte_lo = pte_lo; @@ -1990,12 +1990,12 @@ moea64_pvo_enter(pmap_t pm, uma_zone_t zone, struct pvo_head *pvo_head, vm_offset_t va, vm_offset_t pa, uint64_t pte_lo, int flags, int recurse) { - struct pvo_entry *pvo; - u_int sr; - int first; - u_int ptegidx; - int i; - int bootstrap; + struct pvo_entry *pvo; + uint64_t vsid; + int first; + u_int ptegidx; + int i; + int bootstrap; /* * One nasty thing that can happen here is that the UMA calls to @@ -2017,8 +2017,8 @@ * Compute the PTE Group index. */ va &= ~ADDR_POFF; - sr = va_to_sr(pm->pm_sr, va); - ptegidx = va_to_pteg(sr, va); + vsid = va_to_vsid(pm, va); + ptegidx = va_to_pteg(vsid, va); /* * Remove any existing mapping for this page. Reuse the pvo entry if @@ -2080,7 +2080,8 @@ if (flags & PVO_FAKE) pvo->pvo_vaddr |= PVO_FAKE; - moea64_pte_create(&pvo->pvo_pte.lpte, sr, va, (uint64_t)(pa) | pte_lo); + moea64_pte_create(&pvo->pvo_pte.lpte, vsid, va, + (uint64_t)(pa) | pte_lo); /* * Remember if the list was empty and therefore will be the first @@ -2188,13 +2189,13 @@ static struct pvo_entry * moea64_pvo_find_va(pmap_t pm, vm_offset_t va, int *pteidx_p) { - struct pvo_entry *pvo; - int ptegidx; - u_int sr; + struct pvo_entry *pvo; + int ptegidx; + uint64_t vsid; va &= ~ADDR_POFF; - sr = va_to_sr(pm->pm_sr, va); - ptegidx = va_to_pteg(sr, va); + vsid = va_to_vsid(pm, va); + ptegidx = va_to_pteg(vsid, va); LOCK_TABLE(); LIST_FOREACH(pvo, &moea64_pvo_table[ptegidx], pvo_olink) { @@ -2218,11 +2219,11 @@ * If we haven't been supplied the ptegidx, calculate it. */ if (pteidx == -1) { - int ptegidx; - u_int sr; + int ptegidx; + uint64_t vsid; - sr = va_to_sr(pvo->pvo_pmap->pm_sr, pvo->pvo_vaddr); - ptegidx = va_to_pteg(sr, pvo->pvo_vaddr); + vsid = va_to_vsid(pvo->pvo_pmap, pvo->pvo_vaddr); + ptegidx = va_to_pteg(vsid, pvo->pvo_vaddr); pteidx = moea64_pvo_pte_index(pvo, ptegidx); }