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Date:      Fri, 5 Jun 2015 16:19:45 -0700
From:      Jack Vogel <jfvogel@gmail.com>
To:        Adrian Chadd <adrian@freebsd.org>
Cc:        Jack F Vogel <jfv@freebsd.org>,  "src-committers@freebsd.org" <src-committers@freebsd.org>,  "svn-src-all@freebsd.org" <svn-src-all@freebsd.org>,  "svn-src-head@freebsd.org" <svn-src-head@freebsd.org>
Subject:   Re: svn commit: r284049 - in head/sys: dev/ixl modules/ixl modules/ixlv
Message-ID:  <CAFOYbcmZFdPWdnn05CtCDoDvA=qD7tQo5TsN94_HK9qPsZEC=g@mail.gmail.com>
In-Reply-To: <CAJ-Vmon4VQq%2Bw_o1myPkE0K-RbX6zGj7dVX7tned70zdcSHrxA@mail.gmail.com>
References:  <201506052252.t55MqgOT000856@svn.freebsd.org> <CAJ-Vmon4VQq%2Bw_o1myPkE0K-RbX6zGj7dVX7tned70zdcSHrxA@mail.gmail.com>

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Well, you know me don't you :)  Larger customers will have some kind of
field engineer to contact,
but if anyone here, ahem, doesn't you can work with me to get what you need.

Cheers,

Jack


On Fri, Jun 5, 2015 at 4:07 PM, Adrian Chadd <adrian@freebsd.org> wrote:

> Hi!
>
> Is there any public information / firmware on this? Or do we have to
> have some commercial arrangement with Intel to get the updated
> firmware?
>
> My support channel is "whoever gave me the two ixv 40g nics to test
> netmap on soon" and I don't think they have firmware. :)
>
> Thanks,
>
>
>
> -adrian
>
>
> On 5 June 2015 at 15:52, Jack F Vogel <jfv@freebsd.org> wrote:
> > Author: jfv
> > Date: Fri Jun  5 22:52:42 2015
> > New Revision: 284049
> > URL: https://svnweb.freebsd.org/changeset/base/284049
> >
> > Log:
> >   Update SW4 to the Intel ixl/ixlv drivers. This is primarily a shared
> >   code update, with supporting changes in the CORE. Changes for the
> extended
> >   media types, VF driver has virtual channel protocol changes, and some
> >   register use corrections.  This software change should be coordinated
> with
> >   Firmware updates to your hardware, contact your support channels for
> that.
> >
> >   MFC after:    1 week
> >
> > Added:
> >   head/sys/dev/ixl/i40e_devids.h   (contents, props changed)
> > Modified:
> >   head/sys/dev/ixl/i40e_adminq.c
> >   head/sys/dev/ixl/i40e_adminq.h
> >   head/sys/dev/ixl/i40e_adminq_cmd.h
> >   head/sys/dev/ixl/i40e_common.c
> >   head/sys/dev/ixl/i40e_hmc.c
> >   head/sys/dev/ixl/i40e_hmc.h
> >   head/sys/dev/ixl/i40e_lan_hmc.c
> >   head/sys/dev/ixl/i40e_nvm.c
> >   head/sys/dev/ixl/i40e_osdep.h
> >   head/sys/dev/ixl/i40e_prototype.h
> >   head/sys/dev/ixl/i40e_register.h
> >   head/sys/dev/ixl/i40e_type.h
> >   head/sys/dev/ixl/i40e_virtchnl.h
> >   head/sys/dev/ixl/if_ixl.c
> >   head/sys/dev/ixl/if_ixlv.c
> >   head/sys/dev/ixl/ixlv.h
> >   head/sys/dev/ixl/ixlvc.c
> >   head/sys/modules/ixl/Makefile
> >   head/sys/modules/ixlv/Makefile
> >
> > Modified: head/sys/dev/ixl/i40e_adminq.c
> >
> ==============================================================================
> > --- head/sys/dev/ixl/i40e_adminq.c      Fri Jun  5 21:45:35 2015
> (r284048)
> > +++ head/sys/dev/ixl/i40e_adminq.c      Fri Jun  5 22:52:42 2015
> (r284049)
> > @@ -315,8 +315,12 @@ static enum i40e_status_code i40e_config
> >         wr32(hw, hw->aq.asq.tail, 0);
> >
> >         /* set starting point */
> > -       wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries |
> > -                                 I40E_PF_ATQLEN_ATQENABLE_MASK));
> > +       if (!i40e_is_vf(hw))
> > +               wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries |
> > +
>  I40E_PF_ATQLEN_ATQENABLE_MASK));
> > +       if (i40e_is_vf(hw))
> > +               wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries |
> > +
>  I40E_VF_ATQLEN1_ATQENABLE_MASK));
> >         wr32(hw, hw->aq.asq.bal, I40E_LO_DWORD(hw->aq.asq.desc_buf.pa));
> >         wr32(hw, hw->aq.asq.bah, I40E_HI_DWORD(hw->aq.asq.desc_buf.pa));
> >
> > @@ -344,8 +348,12 @@ static enum i40e_status_code i40e_config
> >         wr32(hw, hw->aq.arq.tail, 0);
> >
> >         /* set starting point */
> > -       wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries |
> > -                                 I40E_PF_ARQLEN_ARQENABLE_MASK));
> > +       if (!i40e_is_vf(hw))
> > +               wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries |
> > +
>  I40E_PF_ARQLEN_ARQENABLE_MASK));
> > +       if (i40e_is_vf(hw))
> > +               wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries |
> > +
>  I40E_VF_ARQLEN1_ARQENABLE_MASK));
> >         wr32(hw, hw->aq.arq.bal, I40E_LO_DWORD(hw->aq.arq.desc_buf.pa));
> >         wr32(hw, hw->aq.arq.bah, I40E_HI_DWORD(hw->aq.arq.desc_buf.pa));
> >
> > @@ -559,6 +567,7 @@ enum i40e_status_code i40e_init_adminq(s
> >  {
> >         enum i40e_status_code ret_code;
> >         u16 eetrack_lo, eetrack_hi;
> > +       u16 cfg_ptr, oem_hi, oem_lo;
> >         int retry = 0;
> >         /* verify input for valid configuration */
> >         if ((hw->aq.num_arq_entries == 0) ||
> > @@ -619,6 +628,12 @@ enum i40e_status_code i40e_init_adminq(s
> >         i40e_read_nvm_word(hw, I40E_SR_NVM_EETRACK_LO, &eetrack_lo);
> >         i40e_read_nvm_word(hw, I40E_SR_NVM_EETRACK_HI, &eetrack_hi);
> >         hw->nvm.eetrack = (eetrack_hi << 16) | eetrack_lo;
> > +       i40e_read_nvm_word(hw, I40E_SR_BOOT_CONFIG_PTR, &cfg_ptr);
> > +       i40e_read_nvm_word(hw, (cfg_ptr + I40E_NVM_OEM_VER_OFF),
> > +                          &oem_hi);
> > +       i40e_read_nvm_word(hw, (cfg_ptr + (I40E_NVM_OEM_VER_OFF + 1)),
> > +                          &oem_lo);
> > +       hw->nvm.oem_ver = ((u32)oem_hi << 16) | oem_lo;
> >
> >         if (hw->aq.api_maj_ver > I40E_FW_API_VERSION_MAJOR) {
> >                 ret_code = I40E_ERR_FIRMWARE_API_VERSION;
> > @@ -669,6 +684,9 @@ enum i40e_status_code i40e_shutdown_admi
> >         i40e_destroy_spinlock(&hw->aq.asq_spinlock);
> >         i40e_destroy_spinlock(&hw->aq.arq_spinlock);
> >
> > +       if (hw->nvm_buff.va)
> > +               i40e_free_virt_mem(hw, &hw->nvm_buff);
> > +
> >         return ret_code;
> >  }
> >
> > @@ -688,16 +706,16 @@ u16 i40e_clean_asq(struct i40e_hw *hw)
> >
> >         desc = I40E_ADMINQ_DESC(*asq, ntc);
> >         details = I40E_ADMINQ_DETAILS(*asq, ntc);
> > +
> >         while (rd32(hw, hw->aq.asq.head) != ntc) {
> >                 i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE,
> > -                          "%s: ntc %d head %d.\n", __FUNCTION__, ntc,
> > -                          rd32(hw, hw->aq.asq.head));
> > +                          "ntc %d head %d.\n", ntc, rd32(hw,
> hw->aq.asq.head));
> >
> >                 if (details->callback) {
> >                         I40E_ADMINQ_CALLBACK cb_func =
> >
>  (I40E_ADMINQ_CALLBACK)details->callback;
> > -                       i40e_memcpy(&desc_cb, desc,
> > -                                   sizeof(struct i40e_aq_desc),
> I40E_DMA_TO_DMA);
> > +                       i40e_memcpy(&desc_cb, desc, sizeof(struct
> i40e_aq_desc),
> > +                                   I40E_DMA_TO_DMA);
> >                         cb_func(hw, &desc_cb);
> >                 }
> >                 i40e_memset(desc, 0, sizeof(*desc), I40E_DMA_MEM);
> > @@ -755,6 +773,8 @@ enum i40e_status_code i40e_asq_send_comm
> >         u16  retval = 0;
> >         u32  val = 0;
> >
> > +       hw->aq.asq_last_status = I40E_AQ_RC_OK;
> > +
> >         val = rd32(hw, hw->aq.asq.head);
> >         if (val >= hw->aq.num_asq_entries) {
> >                 i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE,
> > @@ -912,6 +932,11 @@ enum i40e_status_code i40e_asq_send_comm
> >                    "AQTX: desc and buffer writeback:\n");
> >         i40e_debug_aq(hw, I40E_DEBUG_AQ_COMMAND, (void *)desc, buff,
> buff_size);
> >
> > +       /* save writeback aq if requested */
> > +       if (details->wb_desc)
> > +               i40e_memcpy(details->wb_desc, desc_on_ring,
> > +                           sizeof(struct i40e_aq_desc),
> I40E_DMA_TO_NONDMA);
> > +
> >         /* update the error if time out occurred */
> >         if ((!cmd_completed) &&
> >             (!details->async && !details->postpone)) {
> > @@ -971,7 +996,10 @@ enum i40e_status_code i40e_clean_arq_ele
> >         i40e_acquire_spinlock(&hw->aq.arq_spinlock);
> >
> >         /* set next_to_use to head */
> > -       ntu = (rd32(hw, hw->aq.arq.head) & I40E_PF_ARQH_ARQH_MASK);
> > +       if (!i40e_is_vf(hw))
> > +               ntu = (rd32(hw, hw->aq.arq.head) &
> I40E_PF_ARQH_ARQH_MASK);
> > +       if (i40e_is_vf(hw))
> > +               ntu = (rd32(hw, hw->aq.arq.head) &
> I40E_VF_ARQH1_ARQH_MASK);
> >         if (ntu == ntc) {
> >                 /* nothing to do - shouldn't need to update ring's
> values */
> >                 ret_code = I40E_ERR_ADMIN_QUEUE_NO_WORK;
> > @@ -1040,6 +1068,19 @@ clean_arq_element_out:
> >                         i40e_release_nvm(hw);
> >                         hw->aq.nvm_release_on_done = FALSE;
> >                 }
> > +
> > +               switch (hw->nvmupd_state) {
> > +               case I40E_NVMUPD_STATE_INIT_WAIT:
> > +                       hw->nvmupd_state = I40E_NVMUPD_STATE_INIT;
> > +                       break;
> > +
> > +               case I40E_NVMUPD_STATE_WRITE_WAIT:
> > +                       hw->nvmupd_state = I40E_NVMUPD_STATE_WRITING;
> > +                       break;
> > +
> > +               default:
> > +                       break;
> > +               }
> >         }
> >
> >         return ret_code;
> > @@ -1051,9 +1092,6 @@ void i40e_resume_aq(struct i40e_hw *hw)
> >         hw->aq.asq.next_to_use = 0;
> >         hw->aq.asq.next_to_clean = 0;
> >
> > -#if (I40E_VF_ATQLEN_ATQENABLE_MASK != I40E_PF_ATQLEN_ATQENABLE_MASK)
> > -#error I40E_VF_ATQLEN_ATQENABLE_MASK != I40E_PF_ATQLEN_ATQENABLE_MASK
> > -#endif
> >         i40e_config_asq_regs(hw);
> >
> >         hw->aq.arq.next_to_use = 0;
> >
> > Modified: head/sys/dev/ixl/i40e_adminq.h
> >
> ==============================================================================
> > --- head/sys/dev/ixl/i40e_adminq.h      Fri Jun  5 21:45:35 2015
> (r284048)
> > +++ head/sys/dev/ixl/i40e_adminq.h      Fri Jun  5 22:52:42 2015
> (r284049)
> > @@ -1,6 +1,6 @@
> >
> /******************************************************************************
> >
> > -  Copyright (c) 2013-2014, Intel Corporation
> > +  Copyright (c) 2013-2015, Intel Corporation
> >    All rights reserved.
> >
> >    Redistribution and use in source and binary forms, with or without
> > @@ -77,6 +77,7 @@ struct i40e_asq_cmd_details {
> >         u16 flags_dis;
> >         bool async;
> >         bool postpone;
> > +       struct i40e_aq_desc *wb_desc;
> >  };
> >
> >  #define I40E_ADMINQ_DETAILS(R, i)   \
> >
> > Modified: head/sys/dev/ixl/i40e_adminq_cmd.h
> >
> ==============================================================================
> > --- head/sys/dev/ixl/i40e_adminq_cmd.h  Fri Jun  5 21:45:35 2015
> (r284048)
> > +++ head/sys/dev/ixl/i40e_adminq_cmd.h  Fri Jun  5 22:52:42 2015
> (r284049)
> > @@ -42,7 +42,11 @@
> >   */
> >
> >  #define I40E_FW_API_VERSION_MAJOR      0x0001
> > -#define I40E_FW_API_VERSION_MINOR      0x0002
> > +#ifdef X722_SUPPORT
> > +#define I40E_FW_API_VERSION_MINOR      0x0003
> > +#else
> > +#define I40E_FW_API_VERSION_MINOR      0x0004
> > +#endif
> >
> >  struct i40e_aq_desc {
> >         __le16 flags;
> > @@ -140,12 +144,7 @@ enum i40e_admin_queue_opc {
> >         i40e_aqc_opc_list_func_capabilities     = 0x000A,
> >         i40e_aqc_opc_list_dev_capabilities      = 0x000B,
> >
> > -       i40e_aqc_opc_set_cppm_configuration     = 0x0103,
> > -       i40e_aqc_opc_set_arp_proxy_entry        = 0x0104,
> > -       i40e_aqc_opc_set_ns_proxy_entry         = 0x0105,
> > -
> >         /* LAA */
> > -       i40e_aqc_opc_mng_laa            = 0x0106,   /* AQ obsolete */
> >         i40e_aqc_opc_mac_address_read   = 0x0107,
> >         i40e_aqc_opc_mac_address_write  = 0x0108,
> >
> > @@ -240,6 +239,7 @@ enum i40e_admin_queue_opc {
> >         i40e_aqc_opc_nvm_update                 = 0x0703,
> >         i40e_aqc_opc_nvm_config_read            = 0x0704,
> >         i40e_aqc_opc_nvm_config_write           = 0x0705,
> > +       i40e_aqc_opc_oem_post_update            = 0x0720,
> >
> >         /* virtualization commands */
> >         i40e_aqc_opc_send_msg_to_pf             = 0x0801,
> > @@ -270,7 +270,12 @@ enum i40e_admin_queue_opc {
> >         /* Tunnel commands */
> >         i40e_aqc_opc_add_udp_tunnel     = 0x0B00,
> >         i40e_aqc_opc_del_udp_tunnel     = 0x0B01,
> > -       i40e_aqc_opc_tunnel_key_structure       = 0x0B10,
> > +#ifdef X722_SUPPORT
> > +       i40e_aqc_opc_set_rss_key        = 0x0B02,
> > +       i40e_aqc_opc_set_rss_lut        = 0x0B03,
> > +       i40e_aqc_opc_get_rss_key        = 0x0B04,
> > +       i40e_aqc_opc_get_rss_lut        = 0x0B05,
> > +#endif
> >
> >         /* Async Events */
> >         i40e_aqc_opc_event_lan_overflow         = 0x1001,
> > @@ -282,8 +287,6 @@ enum i40e_admin_queue_opc {
> >         i40e_aqc_opc_oem_ocbb_initialize        = 0xFE03,
> >
> >         /* debug commands */
> > -       i40e_aqc_opc_debug_get_deviceid         = 0xFF00,
> > -       i40e_aqc_opc_debug_set_mode             = 0xFF01,
> >         i40e_aqc_opc_debug_read_reg             = 0xFF03,
> >         i40e_aqc_opc_debug_write_reg            = 0xFF04,
> >         i40e_aqc_opc_debug_modify_reg           = 0xFF07,
> > @@ -517,7 +520,8 @@ struct i40e_aqc_mac_address_read {
> >  #define I40E_AQC_SAN_ADDR_VALID                0x20
> >  #define I40E_AQC_PORT_ADDR_VALID       0x40
> >  #define I40E_AQC_WOL_ADDR_VALID                0x80
> > -#define I40E_AQC_ADDR_VALID_MASK       0xf0
> > +#define I40E_AQC_MC_MAG_EN_VALID       0x100
> > +#define I40E_AQC_ADDR_VALID_MASK       0x1F0
> >         u8      reserved[6];
> >         __le32  addr_high;
> >         __le32  addr_low;
> > @@ -540,7 +544,9 @@ struct i40e_aqc_mac_address_write {
> >  #define I40E_AQC_WRITE_TYPE_LAA_ONLY   0x0000
> >  #define I40E_AQC_WRITE_TYPE_LAA_WOL    0x4000
> >  #define I40E_AQC_WRITE_TYPE_PORT       0x8000
> > -#define I40E_AQC_WRITE_TYPE_MASK       0xc000
> > +#define I40E_AQC_WRITE_TYPE_UPDATE_MC_MAG      0xC000
> > +#define I40E_AQC_WRITE_TYPE_MASK       0xC000
> > +
> >         __le16  mac_sah;
> >         __le32  mac_sal;
> >         u8      reserved[8];
> > @@ -834,8 +840,16 @@ struct i40e_aqc_vsi_properties_data {
> >                                          I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT)
> >         /* queueing option section */
> >         u8      queueing_opt_flags;
> > +#ifdef X722_SUPPORT
> > +#define I40E_AQ_VSI_QUE_OPT_MULTICAST_UDP_ENA  0x04
> > +#define I40E_AQ_VSI_QUE_OPT_UNICAST_UDP_ENA    0x08
> > +#endif
> >  #define I40E_AQ_VSI_QUE_OPT_TCP_ENA    0x10
> >  #define I40E_AQ_VSI_QUE_OPT_FCOE_ENA   0x20
> > +#ifdef X722_SUPPORT
> > +#define I40E_AQ_VSI_QUE_OPT_RSS_LUT_PF 0x00
> > +#define I40E_AQ_VSI_QUE_OPT_RSS_LUT_VSI        0x40
> > +#endif
> >         u8      queueing_opt_reserved[3];
> >         /* scheduler section */
> >         u8      up_enable_bits;
> > @@ -1076,6 +1090,7 @@ struct i40e_aqc_set_vsi_promiscuous_mode
> >         __le16  seid;
> >  #define I40E_AQC_VSI_PROM_CMD_SEID_MASK                0x3FF
> >         __le16  vlan_tag;
> > +#define I40E_AQC_SET_VSI_VLAN_MASK             0x0FFF
> >  #define I40E_AQC_SET_VSI_VLAN_VALID            0x8000
> >         u8      reserved[8];
> >  };
> > @@ -1725,11 +1740,13 @@ struct i40e_aqc_get_link_status {
> >         u8      phy_type;    /* i40e_aq_phy_type   */
> >         u8      link_speed;  /* i40e_aq_link_speed */
> >         u8      link_info;
> > -#define I40E_AQ_LINK_UP                        0x01
> > +#define I40E_AQ_LINK_UP                        0x01    /* obsolete */
> > +#define I40E_AQ_LINK_UP_FUNCTION       0x01
> >  #define I40E_AQ_LINK_FAULT             0x02
> >  #define I40E_AQ_LINK_FAULT_TX          0x04
> >  #define I40E_AQ_LINK_FAULT_RX          0x08
> >  #define I40E_AQ_LINK_FAULT_REMOTE      0x10
> > +#define I40E_AQ_LINK_UP_PORT           0x20
> >  #define I40E_AQ_MEDIA_AVAILABLE                0x40
> >  #define I40E_AQ_SIGNAL_DETECT          0x80
> >         u8      an_info;
> > @@ -1891,6 +1908,26 @@ struct i40e_aqc_nvm_config_data_immediat
> >
> >  I40E_CHECK_STRUCT_LEN(0xc, i40e_aqc_nvm_config_data_immediate_field);
> >
> > +/* OEM Post Update (indirect 0x0720)
> > + * no command data struct used
> > + */
> > + struct i40e_aqc_nvm_oem_post_update {
> > +#define I40E_AQ_NVM_OEM_POST_UPDATE_EXTERNAL_DATA      0x01
> > +       u8 sel_data;
> > +       u8 reserved[7];
> > +};
> > +
> > +I40E_CHECK_STRUCT_LEN(0x8, i40e_aqc_nvm_oem_post_update);
> > +
> > +struct i40e_aqc_nvm_oem_post_update_buffer {
> > +       u8 str_len;
> > +       u8 dev_addr;
> > +       __le16 eeprom_addr;
> > +       u8 data[36];
> > +};
> > +
> > +I40E_CHECK_STRUCT_LEN(0x28, i40e_aqc_nvm_oem_post_update_buffer);
> > +
> >  /* Send to PF command (indirect 0x0801) id is only used by PF
> >   * Send to VF command (indirect 0x0802) id is only used by PF
> >   * Send to Peer PF command (indirect 0x0803)
> > @@ -2064,12 +2101,28 @@ I40E_CHECK_CMD_LENGTH(i40e_aqc_lldp_star
> >  #define I40E_AQC_CEE_APP_ISCSI_MASK    (0x7 <<
> I40E_AQC_CEE_APP_ISCSI_SHIFT)
> >  #define I40E_AQC_CEE_APP_FIP_SHIFT     0x8
> >  #define I40E_AQC_CEE_APP_FIP_MASK      (0x7 <<
> I40E_AQC_CEE_APP_FIP_SHIFT)
> > +
> >  #define I40E_AQC_CEE_PG_STATUS_SHIFT   0x0
> >  #define I40E_AQC_CEE_PG_STATUS_MASK    (0x7 <<
> I40E_AQC_CEE_PG_STATUS_SHIFT)
> >  #define I40E_AQC_CEE_PFC_STATUS_SHIFT  0x3
> >  #define I40E_AQC_CEE_PFC_STATUS_MASK   (0x7 <<
> I40E_AQC_CEE_PFC_STATUS_SHIFT)
> >  #define I40E_AQC_CEE_APP_STATUS_SHIFT  0x8
> >  #define I40E_AQC_CEE_APP_STATUS_MASK   (0x7 <<
> I40E_AQC_CEE_APP_STATUS_SHIFT)
> > +#define I40E_AQC_CEE_FCOE_STATUS_SHIFT 0x8
> > +#define I40E_AQC_CEE_FCOE_STATUS_MASK  (0x7 <<
> I40E_AQC_CEE_FCOE_STATUS_SHIFT)
> > +#define I40E_AQC_CEE_ISCSI_STATUS_SHIFT        0xB
> > +#define I40E_AQC_CEE_ISCSI_STATUS_MASK (0x7 <<
> I40E_AQC_CEE_ISCSI_STATUS_SHIFT)
> > +#define I40E_AQC_CEE_FIP_STATUS_SHIFT  0x10
> > +#define I40E_AQC_CEE_FIP_STATUS_MASK   (0x7 <<
> I40E_AQC_CEE_FIP_STATUS_SHIFT)
> > +
> > +/* struct i40e_aqc_get_cee_dcb_cfg_v1_resp was originally defined with
> > + * word boundary layout issues, which the Linux compilers silently deal
> > + * with by adding padding, making the actual struct larger than
> designed.
> > + * However, the FW compiler for the NIC is less lenient and complains
> > + * about the struct.  Hence, the struct defined here has an extra byte
> in
> > + * fields reserved3 and reserved4 to directly acknowledge that padding,
> > + * and the new length is used in the length check macro.
> > + */
> >  struct i40e_aqc_get_cee_dcb_cfg_v1_resp {
> >         u8      reserved1;
> >         u8      oper_num_tc;
> > @@ -2077,9 +2130,9 @@ struct i40e_aqc_get_cee_dcb_cfg_v1_resp
> >         u8      reserved2;
> >         u8      oper_tc_bw[8];
> >         u8      oper_pfc_en;
> > -       u8      reserved3;
> > +       u8      reserved3[2];
> >         __le16  oper_app_prio;
> > -       u8      reserved4;
> > +       u8      reserved4[2];
> >         __le16  tlv_status;
> >  };
> >
> > @@ -2168,6 +2221,48 @@ struct i40e_aqc_del_udp_tunnel_completio
> >  };
> >
> >  I40E_CHECK_CMD_LENGTH(i40e_aqc_del_udp_tunnel_completion);
> > +#ifdef X722_SUPPORT
> > +
> > +struct i40e_aqc_get_set_rss_key {
> > +#define I40E_AQC_SET_RSS_KEY_VSI_VALID         (0x1 << 15)
> > +#define I40E_AQC_SET_RSS_KEY_VSI_ID_SHIFT      0
> > +#define I40E_AQC_SET_RSS_KEY_VSI_ID_MASK       (0x3FF << \
> > +
>  I40E_AQC_SET_RSS_KEY_VSI_ID_SHIFT)
> > +       __le16  vsi_id;
> > +       u8      reserved[6];
> > +       __le32  addr_high;
> > +       __le32  addr_low;
> > +};
> > +
> > +I40E_CHECK_CMD_LENGTH(i40e_aqc_get_set_rss_key);
> > +
> > +struct i40e_aqc_get_set_rss_key_data {
> > +       u8 standard_rss_key[0x28];
> > +       u8 extended_hash_key[0xc];
> > +};
> > +
> > +I40E_CHECK_STRUCT_LEN(0x34, i40e_aqc_get_set_rss_key_data);
> > +
> > +struct  i40e_aqc_get_set_rss_lut {
> > +#define I40E_AQC_SET_RSS_LUT_VSI_VALID         (0x1 << 15)
> > +#define I40E_AQC_SET_RSS_LUT_VSI_ID_SHIFT      0
> > +#define I40E_AQC_SET_RSS_LUT_VSI_ID_MASK       (0x3FF << \
> > +
>  I40E_AQC_SET_RSS_LUT_VSI_ID_SHIFT)
> > +       __le16  vsi_id;
> > +#define I40E_AQC_SET_RSS_LUT_TABLE_TYPE_SHIFT  0
> > +#define I40E_AQC_SET_RSS_LUT_TABLE_TYPE_MASK   (0x1 << \
> > +
>  I40E_AQC_SET_RSS_LUT_TABLE_TYPE_SHIFT)
> > +
> > +#define I40E_AQC_SET_RSS_LUT_TABLE_TYPE_VSI    0
> > +#define I40E_AQC_SET_RSS_LUT_TABLE_TYPE_PF     1
> > +       __le16  flags;
> > +       u8      reserved[4];
> > +       __le32  addr_high;
> > +       __le32  addr_low;
> > +};
> > +
> > +I40E_CHECK_CMD_LENGTH(i40e_aqc_get_set_rss_lut);
> > +#endif
> >
> >  /* tunnel key structure 0x0B10 */
> >
> >
> > Modified: head/sys/dev/ixl/i40e_common.c
> >
> ==============================================================================
> > --- head/sys/dev/ixl/i40e_common.c      Fri Jun  5 21:45:35 2015
> (r284048)
> > +++ head/sys/dev/ixl/i40e_common.c      Fri Jun  5 22:52:42 2015
> (r284049)
> > @@ -62,9 +62,24 @@ enum i40e_status_code i40e_set_mac_type(
> >                 case I40E_DEV_ID_QSFP_B:
> >                 case I40E_DEV_ID_QSFP_C:
> >                 case I40E_DEV_ID_10G_BASE_T:
> > +               case I40E_DEV_ID_10G_BASE_T4:
> >                 case I40E_DEV_ID_20G_KR2:
> > +               case I40E_DEV_ID_20G_KR2_A:
> >                         hw->mac.type = I40E_MAC_XL710;
> >                         break;
> > +#ifdef X722_SUPPORT
> > +               case I40E_DEV_ID_SFP_X722:
> > +               case I40E_DEV_ID_1G_BASE_T_X722:
> > +               case I40E_DEV_ID_10G_BASE_T_X722:
> > +                       hw->mac.type = I40E_MAC_X722;
> > +                       break;
> > +#endif
> > +#ifdef X722_SUPPORT
> > +               case I40E_DEV_ID_X722_VF:
> > +               case I40E_DEV_ID_X722_VF_HV:
> > +                       hw->mac.type = I40E_MAC_X722_VF;
> > +                       break;
> > +#endif
> >                 case I40E_DEV_ID_VF:
> >                 case I40E_DEV_ID_VF_HV:
> >                         hw->mac.type = I40E_MAC_VF;
> > @@ -83,6 +98,212 @@ enum i40e_status_code i40e_set_mac_type(
> >  }
> >
> >  /**
> > + * i40e_aq_str - convert AQ err code to a string
> > + * @hw: pointer to the HW structure
> > + * @aq_err: the AQ error code to convert
> > + **/
> > +char *i40e_aq_str(struct i40e_hw *hw, enum i40e_admin_queue_err aq_err)
> > +{
> > +       switch (aq_err) {
> > +       case I40E_AQ_RC_OK:
> > +               return "OK";
> > +       case I40E_AQ_RC_EPERM:
> > +               return "I40E_AQ_RC_EPERM";
> > +       case I40E_AQ_RC_ENOENT:
> > +               return "I40E_AQ_RC_ENOENT";
> > +       case I40E_AQ_RC_ESRCH:
> > +               return "I40E_AQ_RC_ESRCH";
> > +       case I40E_AQ_RC_EINTR:
> > +               return "I40E_AQ_RC_EINTR";
> > +       case I40E_AQ_RC_EIO:
> > +               return "I40E_AQ_RC_EIO";
> > +       case I40E_AQ_RC_ENXIO:
> > +               return "I40E_AQ_RC_ENXIO";
> > +       case I40E_AQ_RC_E2BIG:
> > +               return "I40E_AQ_RC_E2BIG";
> > +       case I40E_AQ_RC_EAGAIN:
> > +               return "I40E_AQ_RC_EAGAIN";
> > +       case I40E_AQ_RC_ENOMEM:
> > +               return "I40E_AQ_RC_ENOMEM";
> > +       case I40E_AQ_RC_EACCES:
> > +               return "I40E_AQ_RC_EACCES";
> > +       case I40E_AQ_RC_EFAULT:
> > +               return "I40E_AQ_RC_EFAULT";
> > +       case I40E_AQ_RC_EBUSY:
> > +               return "I40E_AQ_RC_EBUSY";
> > +       case I40E_AQ_RC_EEXIST:
> > +               return "I40E_AQ_RC_EEXIST";
> > +       case I40E_AQ_RC_EINVAL:
> > +               return "I40E_AQ_RC_EINVAL";
> > +       case I40E_AQ_RC_ENOTTY:
> > +               return "I40E_AQ_RC_ENOTTY";
> > +       case I40E_AQ_RC_ENOSPC:
> > +               return "I40E_AQ_RC_ENOSPC";
> > +       case I40E_AQ_RC_ENOSYS:
> > +               return "I40E_AQ_RC_ENOSYS";
> > +       case I40E_AQ_RC_ERANGE:
> > +               return "I40E_AQ_RC_ERANGE";
> > +       case I40E_AQ_RC_EFLUSHED:
> > +               return "I40E_AQ_RC_EFLUSHED";
> > +       case I40E_AQ_RC_BAD_ADDR:
> > +               return "I40E_AQ_RC_BAD_ADDR";
> > +       case I40E_AQ_RC_EMODE:
> > +               return "I40E_AQ_RC_EMODE";
> > +       case I40E_AQ_RC_EFBIG:
> > +               return "I40E_AQ_RC_EFBIG";
> > +       }
> > +
> > +       snprintf(hw->err_str, sizeof(hw->err_str), "%d", aq_err);
> > +       return hw->err_str;
> > +}
> > +
> > +/**
> > + * i40e_stat_str - convert status err code to a string
> > + * @hw: pointer to the HW structure
> > + * @stat_err: the status error code to convert
> > + **/
> > +char *i40e_stat_str(struct i40e_hw *hw, enum i40e_status_code stat_err)
> > +{
> > +       switch (stat_err) {
> > +       case I40E_SUCCESS:
> > +               return "OK";
> > +       case I40E_ERR_NVM:
> > +               return "I40E_ERR_NVM";
> > +       case I40E_ERR_NVM_CHECKSUM:
> > +               return "I40E_ERR_NVM_CHECKSUM";
> > +       case I40E_ERR_PHY:
> > +               return "I40E_ERR_PHY";
> > +       case I40E_ERR_CONFIG:
> > +               return "I40E_ERR_CONFIG";
> > +       case I40E_ERR_PARAM:
> > +               return "I40E_ERR_PARAM";
> > +       case I40E_ERR_MAC_TYPE:
> > +               return "I40E_ERR_MAC_TYPE";
> > +       case I40E_ERR_UNKNOWN_PHY:
> > +               return "I40E_ERR_UNKNOWN_PHY";
> > +       case I40E_ERR_LINK_SETUP:
> > +               return "I40E_ERR_LINK_SETUP";
> > +       case I40E_ERR_ADAPTER_STOPPED:
> > +               return "I40E_ERR_ADAPTER_STOPPED";
> > +       case I40E_ERR_INVALID_MAC_ADDR:
> > +               return "I40E_ERR_INVALID_MAC_ADDR";
> > +       case I40E_ERR_DEVICE_NOT_SUPPORTED:
> > +               return "I40E_ERR_DEVICE_NOT_SUPPORTED";
> > +       case I40E_ERR_MASTER_REQUESTS_PENDING:
> > +               return "I40E_ERR_MASTER_REQUESTS_PENDING";
> > +       case I40E_ERR_INVALID_LINK_SETTINGS:
> > +               return "I40E_ERR_INVALID_LINK_SETTINGS";
> > +       case I40E_ERR_AUTONEG_NOT_COMPLETE:
> > +               return "I40E_ERR_AUTONEG_NOT_COMPLETE";
> > +       case I40E_ERR_RESET_FAILED:
> > +               return "I40E_ERR_RESET_FAILED";
> > +       case I40E_ERR_SWFW_SYNC:
> > +               return "I40E_ERR_SWFW_SYNC";
> > +       case I40E_ERR_NO_AVAILABLE_VSI:
> > +               return "I40E_ERR_NO_AVAILABLE_VSI";
> > +       case I40E_ERR_NO_MEMORY:
> > +               return "I40E_ERR_NO_MEMORY";
> > +       case I40E_ERR_BAD_PTR:
> > +               return "I40E_ERR_BAD_PTR";
> > +       case I40E_ERR_RING_FULL:
> > +               return "I40E_ERR_RING_FULL";
> > +       case I40E_ERR_INVALID_PD_ID:
> > +               return "I40E_ERR_INVALID_PD_ID";
> > +       case I40E_ERR_INVALID_QP_ID:
> > +               return "I40E_ERR_INVALID_QP_ID";
> > +       case I40E_ERR_INVALID_CQ_ID:
> > +               return "I40E_ERR_INVALID_CQ_ID";
> > +       case I40E_ERR_INVALID_CEQ_ID:
> > +               return "I40E_ERR_INVALID_CEQ_ID";
> > +       case I40E_ERR_INVALID_AEQ_ID:
> > +               return "I40E_ERR_INVALID_AEQ_ID";
> > +       case I40E_ERR_INVALID_SIZE:
> > +               return "I40E_ERR_INVALID_SIZE";
> > +       case I40E_ERR_INVALID_ARP_INDEX:
> > +               return "I40E_ERR_INVALID_ARP_INDEX";
> > +       case I40E_ERR_INVALID_FPM_FUNC_ID:
> > +               return "I40E_ERR_INVALID_FPM_FUNC_ID";
> > +       case I40E_ERR_QP_INVALID_MSG_SIZE:
> > +               return "I40E_ERR_QP_INVALID_MSG_SIZE";
> > +       case I40E_ERR_QP_TOOMANY_WRS_POSTED:
> > +               return "I40E_ERR_QP_TOOMANY_WRS_POSTED";
> > +       case I40E_ERR_INVALID_FRAG_COUNT:
> > +               return "I40E_ERR_INVALID_FRAG_COUNT";
> > +       case I40E_ERR_QUEUE_EMPTY:
> > +               return "I40E_ERR_QUEUE_EMPTY";
> > +       case I40E_ERR_INVALID_ALIGNMENT:
> > +               return "I40E_ERR_INVALID_ALIGNMENT";
> > +       case I40E_ERR_FLUSHED_QUEUE:
> > +               return "I40E_ERR_FLUSHED_QUEUE";
> > +       case I40E_ERR_INVALID_PUSH_PAGE_INDEX:
> > +               return "I40E_ERR_INVALID_PUSH_PAGE_INDEX";
> > +       case I40E_ERR_INVALID_IMM_DATA_SIZE:
> > +               return "I40E_ERR_INVALID_IMM_DATA_SIZE";
> > +       case I40E_ERR_TIMEOUT:
> > +               return "I40E_ERR_TIMEOUT";
> > +       case I40E_ERR_OPCODE_MISMATCH:
> > +               return "I40E_ERR_OPCODE_MISMATCH";
> > +       case I40E_ERR_CQP_COMPL_ERROR:
> > +               return "I40E_ERR_CQP_COMPL_ERROR";
> > +       case I40E_ERR_INVALID_VF_ID:
> > +               return "I40E_ERR_INVALID_VF_ID";
> > +       case I40E_ERR_INVALID_HMCFN_ID:
> > +               return "I40E_ERR_INVALID_HMCFN_ID";
> > +       case I40E_ERR_BACKING_PAGE_ERROR:
> > +               return "I40E_ERR_BACKING_PAGE_ERROR";
> > +       case I40E_ERR_NO_PBLCHUNKS_AVAILABLE:
> > +               return "I40E_ERR_NO_PBLCHUNKS_AVAILABLE";
> > +       case I40E_ERR_INVALID_PBLE_INDEX:
> > +               return "I40E_ERR_INVALID_PBLE_INDEX";
> > +       case I40E_ERR_INVALID_SD_INDEX:
> > +               return "I40E_ERR_INVALID_SD_INDEX";
> > +       case I40E_ERR_INVALID_PAGE_DESC_INDEX:
> > +               return "I40E_ERR_INVALID_PAGE_DESC_INDEX";
> > +       case I40E_ERR_INVALID_SD_TYPE:
> > +               return "I40E_ERR_INVALID_SD_TYPE";
> > +       case I40E_ERR_MEMCPY_FAILED:
> > +               return "I40E_ERR_MEMCPY_FAILED";
> > +       case I40E_ERR_INVALID_HMC_OBJ_INDEX:
> > +               return "I40E_ERR_INVALID_HMC_OBJ_INDEX";
> > +       case I40E_ERR_INVALID_HMC_OBJ_COUNT:
> > +               return "I40E_ERR_INVALID_HMC_OBJ_COUNT";
> > +       case I40E_ERR_INVALID_SRQ_ARM_LIMIT:
> > +               return "I40E_ERR_INVALID_SRQ_ARM_LIMIT";
> > +       case I40E_ERR_SRQ_ENABLED:
> > +               return "I40E_ERR_SRQ_ENABLED";
> > +       case I40E_ERR_ADMIN_QUEUE_ERROR:
> > +               return "I40E_ERR_ADMIN_QUEUE_ERROR";
> > +       case I40E_ERR_ADMIN_QUEUE_TIMEOUT:
> > +               return "I40E_ERR_ADMIN_QUEUE_TIMEOUT";
> > +       case I40E_ERR_BUF_TOO_SHORT:
> > +               return "I40E_ERR_BUF_TOO_SHORT";
> > +       case I40E_ERR_ADMIN_QUEUE_FULL:
> > +               return "I40E_ERR_ADMIN_QUEUE_FULL";
> > +       case I40E_ERR_ADMIN_QUEUE_NO_WORK:
> > +               return "I40E_ERR_ADMIN_QUEUE_NO_WORK";
> > +       case I40E_ERR_BAD_IWARP_CQE:
> > +               return "I40E_ERR_BAD_IWARP_CQE";
> > +       case I40E_ERR_NVM_BLANK_MODE:
> > +               return "I40E_ERR_NVM_BLANK_MODE";
> > +       case I40E_ERR_NOT_IMPLEMENTED:
> > +               return "I40E_ERR_NOT_IMPLEMENTED";
> > +       case I40E_ERR_PE_DOORBELL_NOT_ENABLED:
> > +               return "I40E_ERR_PE_DOORBELL_NOT_ENABLED";
> > +       case I40E_ERR_DIAG_TEST_FAILED:
> > +               return "I40E_ERR_DIAG_TEST_FAILED";
> > +       case I40E_ERR_NOT_READY:
> > +               return "I40E_ERR_NOT_READY";
> > +       case I40E_NOT_SUPPORTED:
> > +               return "I40E_NOT_SUPPORTED";
> > +       case I40E_ERR_FIRMWARE_API_VERSION:
> > +               return "I40E_ERR_FIRMWARE_API_VERSION";
> > +       }
> > +
> > +       snprintf(hw->err_str, sizeof(hw->err_str), "%d", stat_err);
> > +       return hw->err_str;
> > +}
> > +
> > +/**
> >   * i40e_debug_aq
> >   * @hw: debug mask related to admin queue
> >   * @mask: debug mask
> > @@ -154,9 +375,13 @@ void i40e_debug_aq(struct i40e_hw *hw, e
> >  bool i40e_check_asq_alive(struct i40e_hw *hw)
> >  {
> >         if (hw->aq.asq.len)
> > -               return !!(rd32(hw, hw->aq.asq.len) &
> I40E_PF_ATQLEN_ATQENABLE_MASK);
> > -       else
> > -               return FALSE;
> > +               if (!i40e_is_vf(hw))
> > +                       return !!(rd32(hw, hw->aq.asq.len) &
> > +                               I40E_PF_ATQLEN_ATQENABLE_MASK);
> > +               if (i40e_is_vf(hw))
> > +                       return !!(rd32(hw, hw->aq.asq.len) &
> > +                               I40E_VF_ATQLEN1_ATQENABLE_MASK);
> > +       return FALSE;
> >  }
> >
> >  /**
> > @@ -184,6 +409,171 @@ enum i40e_status_code i40e_aq_queue_shut
> >
> >         return status;
> >  }
> > +#ifdef X722_SUPPORT
> > +
> > +/**
> > + * i40e_aq_get_set_rss_lut
> > + * @hw: pointer to the hardware structure
> > + * @vsi_id: vsi fw index
> > + * @pf_lut: for PF table set TRUE, for VSI table set FALSE
> > + * @lut: pointer to the lut buffer provided by the caller
> > + * @lut_size: size of the lut buffer
> > + * @set: set TRUE to set the table, FALSE to get the table
> > + *
> > + * Internal function to get or set RSS look up table
> > + **/
> > +static enum i40e_status_code i40e_aq_get_set_rss_lut(struct i40e_hw *hw,
> > +                                                    u16 vsi_id, bool
> pf_lut,
> > +                                                    u8 *lut, u16
> lut_size,
> > +                                                    bool set)
> > +{
> > +       enum i40e_status_code status;
> > +       struct i40e_aq_desc desc;
> > +       struct i40e_aqc_get_set_rss_lut *cmd_resp =
> > +                  (struct i40e_aqc_get_set_rss_lut *)&desc.params.raw;
> > +
> > +       if (set)
> > +               i40e_fill_default_direct_cmd_desc(&desc,
> > +
>  i40e_aqc_opc_set_rss_lut);
> > +       else
> > +               i40e_fill_default_direct_cmd_desc(&desc,
> > +
>  i40e_aqc_opc_get_rss_lut);
> > +
> > +       /* Indirect command */
> > +       desc.flags |= CPU_TO_LE16((u16)I40E_AQ_FLAG_BUF);
> > +       desc.flags |= CPU_TO_LE16((u16)I40E_AQ_FLAG_RD);
> > +
> > +       cmd_resp->vsi_id =
> > +                       CPU_TO_LE16((u16)((vsi_id <<
> > +
>  I40E_AQC_SET_RSS_LUT_VSI_ID_SHIFT) &
> > +
>  I40E_AQC_SET_RSS_LUT_VSI_ID_MASK));
> > +       cmd_resp->vsi_id |=
> CPU_TO_LE16((u16)I40E_AQC_SET_RSS_LUT_VSI_VALID);
> > +
> > +       if (pf_lut)
> > +               cmd_resp->flags |= CPU_TO_LE16((u16)
> > +
>  ((I40E_AQC_SET_RSS_LUT_TABLE_TYPE_PF <<
> > +
>  I40E_AQC_SET_RSS_LUT_TABLE_TYPE_SHIFT) &
> > +
>  I40E_AQC_SET_RSS_LUT_TABLE_TYPE_MASK));
> > +       else
> > +               cmd_resp->flags |= CPU_TO_LE16((u16)
> > +
>  ((I40E_AQC_SET_RSS_LUT_TABLE_TYPE_VSI <<
> > +
>  I40E_AQC_SET_RSS_LUT_TABLE_TYPE_SHIFT) &
> > +
>  I40E_AQC_SET_RSS_LUT_TABLE_TYPE_MASK));
> > +
> > +       cmd_resp->addr_high = CPU_TO_LE32(I40E_HI_WORD((u64)lut));
> > +       cmd_resp->addr_low = CPU_TO_LE32(I40E_LO_DWORD((u64)lut));
> > +
> > +       status = i40e_asq_send_command(hw, &desc, lut, lut_size, NULL);
> > +
> > +       return status;
> > +}
> > +
> > +/**
> > + * i40e_aq_get_rss_lut
> > + * @hw: pointer to the hardware structure
> > + * @vsi_id: vsi fw index
> > + * @pf_lut: for PF table set TRUE, for VSI table set FALSE
> > + * @lut: pointer to the lut buffer provided by the caller
> > + * @lut_size: size of the lut buffer
> > + *
> > + * get the RSS lookup table, PF or VSI type
> > + **/
> > +enum i40e_status_code i40e_aq_get_rss_lut(struct i40e_hw *hw, u16
> vsi_id,
> > +                                         bool pf_lut, u8 *lut, u16
> lut_size)
> > +{
> > +       return i40e_aq_get_set_rss_lut(hw, vsi_id, pf_lut, lut, lut_size,
> > +                                      FALSE);
> > +}
> > +
> > +/**
> > + * i40e_aq_set_rss_lut
> > + * @hw: pointer to the hardware structure
> > + * @vsi_id: vsi fw index
> > + * @pf_lut: for PF table set TRUE, for VSI table set FALSE
> > + * @lut: pointer to the lut buffer provided by the caller
> > + * @lut_size: size of the lut buffer
> > + *
> > + * set the RSS lookup table, PF or VSI type
> > + **/
> > +enum i40e_status_code i40e_aq_set_rss_lut(struct i40e_hw *hw, u16
> vsi_id,
> > +                                         bool pf_lut, u8 *lut, u16
> lut_size)
> > +{
> > +       return i40e_aq_get_set_rss_lut(hw, vsi_id, pf_lut, lut,
> lut_size, TRUE);
> > +}
> > +
> > +/**
> > + * i40e_aq_get_set_rss_key
> > + * @hw: pointer to the hw struct
> > + * @vsi_id: vsi fw index
> > + * @key: pointer to key info struct
> > + * @set: set TRUE to set the key, FALSE to get the key
> > + *
> > + * get the RSS key per VSI
> > + **/
> > +static enum i40e_status_code i40e_aq_get_set_rss_key(struct i40e_hw *hw,
> > +                                     u16 vsi_id,
> > +                                     struct
> i40e_aqc_get_set_rss_key_data *key,
> > +                                     bool set)
> > +{
> > +       enum i40e_status_code status;
> > +       struct i40e_aq_desc desc;
> > +       struct i40e_aqc_get_set_rss_key *cmd_resp =
> > +                       (struct i40e_aqc_get_set_rss_key
> *)&desc.params.raw;
> > +       u16 key_size = sizeof(struct i40e_aqc_get_set_rss_key_data);
> > +
> > +       if (set)
> > +               i40e_fill_default_direct_cmd_desc(&desc,
> > +
>  i40e_aqc_opc_set_rss_key);
> > +       else
> > +               i40e_fill_default_direct_cmd_desc(&desc,
> > +
>  i40e_aqc_opc_get_rss_key);
> > +
> > +       /* Indirect command */
> > +       desc.flags |= CPU_TO_LE16((u16)I40E_AQ_FLAG_BUF);
> > +       desc.flags |= CPU_TO_LE16((u16)I40E_AQ_FLAG_RD);
> > +
> > +       cmd_resp->vsi_id =
> > +                       CPU_TO_LE16((u16)((vsi_id <<
> > +
>  I40E_AQC_SET_RSS_KEY_VSI_ID_SHIFT) &
> > +
>  I40E_AQC_SET_RSS_KEY_VSI_ID_MASK));
> > +       cmd_resp->vsi_id |=
> CPU_TO_LE16((u16)I40E_AQC_SET_RSS_KEY_VSI_VALID);
> > +       cmd_resp->addr_high = CPU_TO_LE32(I40E_HI_WORD((u64)key));
> > +       cmd_resp->addr_low = CPU_TO_LE32(I40E_LO_DWORD((u64)key));
> > +
> > +       status = i40e_asq_send_command(hw, &desc, key, key_size, NULL);
> > +
> > +       return status;
> > +}
> > +
> > +/**
> > + * i40e_aq_get_rss_key
> > + * @hw: pointer to the hw struct
> > + * @vsi_id: vsi fw index
> > + * @key: pointer to key info struct
> > + *
> > + **/
> > +enum i40e_status_code i40e_aq_get_rss_key(struct i40e_hw *hw,
> > +                                     u16 vsi_id,
> > +                                     struct
> i40e_aqc_get_set_rss_key_data *key)
> > +{
> > +       return i40e_aq_get_set_rss_key(hw, vsi_id, key, FALSE);
> > +}
> > +
> > +/**
> > + * i40e_aq_set_rss_key
> > + * @hw: pointer to the hw struct
> > + * @vsi_id: vsi fw index
> > + * @key: pointer to key info struct
> > + *
> > + * set the RSS key per VSI
> > + **/
> > +enum i40e_status_code i40e_aq_set_rss_key(struct i40e_hw *hw,
> > +                                     u16 vsi_id,
> > +                                     struct
> i40e_aqc_get_set_rss_key_data *key)
> > +{
> > +       return i40e_aq_get_set_rss_key(hw, vsi_id, key, TRUE);
> > +}
> > +#endif /* X722_SUPPORT */
> >
> >  /* The i40e_ptype_lookup table is used to convert from the 8-bit ptype
> in the
> >   * hardware to a bit-field that can be used by SW to more easily
> determine the
> > @@ -598,6 +988,9 @@ enum i40e_status_code i40e_init_shared_c
> >
> >         switch (hw->mac.type) {
> >         case I40E_MAC_XL710:
> > +#ifdef X722_SUPPORT
> > +       case I40E_MAC_X722:
> > +#endif
> >                 break;
> >         default:
> >                 return I40E_ERR_DEVICE_NOT_SUPPORTED;
> > @@ -888,7 +1281,7 @@ enum i40e_status_code i40e_pf_reset(stru
> >         grst_del = (rd32(hw, I40E_GLGEN_RSTCTL) &
> >                         I40E_GLGEN_RSTCTL_GRSTDEL_MASK) >>
> >                         I40E_GLGEN_RSTCTL_GRSTDEL_SHIFT;
> > -       for (cnt = 0; cnt < grst_del + 2; cnt++) {
> > +       for (cnt = 0; cnt < grst_del + 10; cnt++) {
> >                 reg = rd32(hw, I40E_GLGEN_RSTAT);
> >                 if (!(reg & I40E_GLGEN_RSTAT_DEVSTATE_MASK))
> >                         break;
> > @@ -1108,9 +1501,11 @@ u32 i40e_led_get(struct i40e_hw *hw)
> >                 if (!gpio_val)
> >                         continue;
> >
> > -               /* ignore gpio LED src mode entries related to the
> activity LEDs */
> > -               current_mode = ((gpio_val &
> I40E_GLGEN_GPIO_CTL_LED_MODE_MASK) >>
> > -                       I40E_GLGEN_GPIO_CTL_LED_MODE_SHIFT);
> > +               /* ignore gpio LED src mode entries related to the
> activity
> > +                *  LEDs
> > +                */
> > +               current_mode = ((gpio_val &
> I40E_GLGEN_GPIO_CTL_LED_MODE_MASK)
> > +                               >> I40E_GLGEN_GPIO_CTL_LED_MODE_SHIFT);
> >                 switch (current_mode) {
> >                 case I40E_COMBINED_ACTIVITY:
> >                 case I40E_FILTER_ACTIVITY:
> > @@ -1154,9 +1549,11 @@ void i40e_led_set(struct i40e_hw *hw, u3
> >                 if (!gpio_val)
> >                         continue;
> >
> > -               /* ignore gpio LED src mode entries related to the
> activity LEDs */
> > -               current_mode = ((gpio_val &
> I40E_GLGEN_GPIO_CTL_LED_MODE_MASK) >>
> > -                       I40E_GLGEN_GPIO_CTL_LED_MODE_SHIFT);
> > +               /* ignore gpio LED src mode entries related to the
> activity
> > +                * LEDs
> > +                */
> > +               current_mode = ((gpio_val &
> I40E_GLGEN_GPIO_CTL_LED_MODE_MASK)
> > +                               >> I40E_GLGEN_GPIO_CTL_LED_MODE_SHIFT);
> >                 switch (current_mode) {
> >                 case I40E_COMBINED_ACTIVITY:
> >                 case I40E_FILTER_ACTIVITY:
> > @@ -1175,9 +1572,9 @@ void i40e_led_set(struct i40e_hw *hw, u3
> >                         blink = FALSE;
> >
> >                 if (blink)
> > -                       gpio_val |= (1 <<
> I40E_GLGEN_GPIO_CTL_LED_BLINK_SHIFT);
> > +                       gpio_val |=
> BIT(I40E_GLGEN_GPIO_CTL_LED_BLINK_SHIFT);
> >                 else
> > -                       gpio_val &= ~(1 <<
> I40E_GLGEN_GPIO_CTL_LED_BLINK_SHIFT);
> > +                       gpio_val &=
> ~BIT(I40E_GLGEN_GPIO_CTL_LED_BLINK_SHIFT);
> >
> >                 wr32(hw, I40E_GLGEN_GPIO_CTL(i), gpio_val);
> >                 break;
> > @@ -1329,14 +1726,14 @@ enum i40e_status_code i40e_set_fc(struct
> >                         *aq_failures |= I40E_SET_FC_AQ_FAIL_SET;
> >         }
> >         /* Update the link info */
> > -       status = i40e_aq_get_link_info(hw, TRUE, NULL, NULL);
> > +       status = i40e_update_link_info(hw);
> >         if (status) {
> >                 /* Wait a little bit (on 40G cards it sometimes takes a
> really
> >                  * long time for link to come back from the atomic reset)
> >                  * and try once more
> >                  */
> >                 i40e_msec_delay(1000);
> > -               status = i40e_aq_get_link_info(hw, TRUE, NULL, NULL);
> > +               status = i40e_update_link_info(hw);
> >         }
> >         if (status)
> >                 *aq_failures |= I40E_SET_FC_AQ_FAIL_UPDATE;
> > @@ -1525,7 +1922,6 @@ aq_get_link_info_exit:
> >         return status;
> >  }
> >
> > -
> >  /**
> >   * i40e_aq_set_phy_int_mask
> >   * @hw: pointer to the hw struct
> > @@ -1837,6 +2233,74 @@ enum i40e_status_code i40e_aq_set_vsi_mu
> >  }
> >
> >  /**
> > + * i40e_aq_set_vsi_mc_promisc_on_vlan
> > + * @hw: pointer to the hw struct
> > + * @seid: vsi number
> > + * @enable: set MAC L2 layer unicast promiscuous enable/disable for a
> given VLAN
> > + * @vid: The VLAN tag filter - capture any multicast packet with this
> VLAN tag
> > + * @cmd_details: pointer to command details structure or NULL
> > + **/
> > +enum i40e_status_code i40e_aq_set_vsi_mc_promisc_on_vlan(struct i40e_hw
> *hw,
> > +                               u16 seid, bool enable, u16 vid,
> > +                               struct i40e_asq_cmd_details *cmd_details)
> > +{
> > +       struct i40e_aq_desc desc;
> > +       struct i40e_aqc_set_vsi_promiscuous_modes *cmd =
> > +               (struct i40e_aqc_set_vsi_promiscuous_modes
> *)&desc.params.raw;
> > +       enum i40e_status_code status;
> > +       u16 flags = 0;
> > +
> > +       i40e_fill_default_direct_cmd_desc(&desc,
> > +
>  i40e_aqc_opc_set_vsi_promiscuous_modes);
> > +
> > +       if (enable)
> > +               flags |= I40E_AQC_SET_VSI_PROMISC_MULTICAST;
> > +
> > +       cmd->promiscuous_flags = CPU_TO_LE16(flags);
> > +       cmd->valid_flags =
> CPU_TO_LE16(I40E_AQC_SET_VSI_PROMISC_MULTICAST);
> > +       cmd->seid = CPU_TO_LE16(seid);
> > +       cmd->vlan_tag = CPU_TO_LE16(vid | I40E_AQC_SET_VSI_VLAN_VALID);
> > +
> > +       status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
> > +
> > +       return status;
> > +}
> > +
> > +/**
> > + * i40e_aq_set_vsi_uc_promisc_on_vlan
> > + * @hw: pointer to the hw struct
> > + * @seid: vsi number
> > + * @enable: set MAC L2 layer unicast promiscuous enable/disable for a
> given VLAN
> > + * @vid: The VLAN tag filter - capture any unicast packet with this
> VLAN tag
> > + * @cmd_details: pointer to command details structure or NULL
> > + **/
> > +enum i40e_status_code i40e_aq_set_vsi_uc_promisc_on_vlan(struct i40e_hw
> *hw,
> > +                               u16 seid, bool enable, u16 vid,
> > +                               struct i40e_asq_cmd_details *cmd_details)
> > +{
> > +       struct i40e_aq_desc desc;
> > +       struct i40e_aqc_set_vsi_promiscuous_modes *cmd =
> > +               (struct i40e_aqc_set_vsi_promiscuous_modes
> *)&desc.params.raw;
> > +       enum i40e_status_code status;
> > +       u16 flags = 0;
> > +
> > +       i40e_fill_default_direct_cmd_desc(&desc,
> > +
>  i40e_aqc_opc_set_vsi_promiscuous_modes);
> > +
> > +       if (enable)
> > +               flags |= I40E_AQC_SET_VSI_PROMISC_UNICAST;
> > +
> > +       cmd->promiscuous_flags = CPU_TO_LE16(flags);
> > +       cmd->valid_flags = CPU_TO_LE16(I40E_AQC_SET_VSI_PROMISC_UNICAST);
> > +       cmd->seid = CPU_TO_LE16(seid);
> > +       cmd->vlan_tag = CPU_TO_LE16(vid | I40E_AQC_SET_VSI_VLAN_VALID);
> > +
> > +       status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
> > +
> > +       return status;
> > +}
> > +
> > +/**
> >   * i40e_aq_set_vsi_broadcast
> >   * @hw: pointer to the hw struct
> >   * @seid: vsi number
> > @@ -2067,30 +2531,56 @@ enum i40e_status_code i40e_aq_send_drive
> >  /**
> >   * i40e_get_link_status - get status of the HW network link
> >   * @hw: pointer to the hw struct
> > + * @link_up: pointer to bool (TRUE/FALSE = linkup/linkdown)
> >   *
> > - * Returns TRUE if link is up, FALSE if link is down.
> > + * Variable link_up TRUE if link is up, FALSE if link is down.
> >
> > *** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
> >
>



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