Date: Fri, 19 Jun 2020 15:17:41 +0000 From: Dan Kotowski <dan.kotowski@a9development.com> To: myfreeweb <greg@unrelenting.technology> Cc: freebsd-arm <freebsd-arm@freebsd.org> Subject: Re: FreeBSD on Layerscape/QorIQ LX2160X Message-ID: <zVEDXaRnvcvU3drGP9XB7MVC8D8Kru-8boDdtqNNTwMZWTF9uI49hFiWpUr974ddgsvShRzLqNDcwkB-tR00LQY7a50rXmixMisMtVr4Xqg=@a9development.com> In-Reply-To: <71481BF5-3972-45A3-8287-FCEB1FCCDC41@unrelenting.technology> References: <NkmJNP_BMdinQ07E7zvRW9EQtYTkHLISOPlALNNcbFXi7d0dsuvgHD2IW73ptiSh1kEml7_VHb9_eTIMaLAIeAici_qpz2UyIrBWzXR4mvE=@a9development.com> <c1e4129989005bc9bfd117988019107d@unrelenting.technology> <XYXpaNQ3XeZR6g5RpmjR3qs56wTKfNi_OpPX53S3yYdPMNMWR0kme-Q7hmNpxzR6EL3DqKxUnG8BcW6ueHv82Kaexu1j4VSLtNtQgYuxX_g=@a9development.com> <eRSoUazwekUoXHKtXhs_unN_78Zp3ow_uJ8j-ODdb7mgzz3n8L18wonbrqkmPn2ulVXoUKxHLh8Cc0VU6KMeIEm3X0KsPn8NH-JiqKmq8fI=@a9development.com> <D2780D27-20F4-4706-9956-7E188AD73F62@unrelenting.technology> <iIPsVK-flf-29Ti4agFHulCx5v1aEOVnPY6tyxErDGGxUlRvonYC7xCUGxHNgH64ZOpBLbwzAubg8gARrYPgd8qLOVfFk1PmcxSp0QNB_js=@a9development.com> <BE2611FE-FC83-4E3D-9977-E502DE8537A7@unrelenting.technology> <z-iiKTafA-iirmiH_wVWUM9BHEa9uhccyljIc5_buK8CgCdzAXdUgQuViiaULImI0BVmx9N3lKO_9_NN9IHfSYCv1H9W9P8n98ltXG02MT4=@a9development.com> <71481BF5-3972-45A3-8287-FCEB1FCCDC41@unrelenting.technology>
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> > > > > By the way, did you get any different firmware builds in the mean= time? That don't have everything suspiciously routed to the SMMU in IORT.. > > > > > > > > s/suspiciously/by design/ > > > > BEGIN QUOTE > > > > the PCIe root nodes are hidden from the rich OS with this configura= tion. To access the root nodes you need a quirk implemented. > > > > eventually it will be an option for those that want to run custom k= ernels, but for now this is the solution for the most SBSA like configurati= on > > > > END QUOTE > > > > > > And how are we supposed to get any MSI-X interrupts in this configura= tion? > > > Our fallback code for when nothing was matched in IORT (i.e. directly= using PCIe RID with no offset) did not result in working interrupts. > > > IIRC legacy interrupts didn't work either, but maybe you should retes= t them (disabling MSI, MSI-X). > > > > NSTR, but here you go anyways: https://gist.github.com/agrajag9/d4d75d7= dca41b3cb64c0a4243eed4eb7 > > Forgive my n00bishness and feel free to correct me below, I'm still lea= rning my way around down here... What are we doing with all the GSIVs in th= e IORT SMMU node? > > Based on reading the table and dmesg.boot, I'm seeing the following: > > > > - ITS node for gics > > - 2 root complex nodes for pci0 and 1, > > - Named component nodes for MCE, ugens, mmcs (if we still had that in= ), and ahcis > > > > But then the SMMU node has: > > > > - 64 context interrupts, > > - 10 PMU interrupts, and > > - 5 ID mappings > > > > Where do these go? Are we perhaps not walking this section properly and= that's the quirk to which Jon is referring? > > We do not support the SMMU at all. (There is a patch for SMMUv3 support b= ut this chip has a v1/v2.) > > SMMU support should not be mandatory, it's an IOMMU used for virtualizati= on or additional DMA security protection (like dmar on Intel). > > NetBSD does not support it either, and they don't seem to have any interr= upt problems.. > > In public code (lx2160a master), PCIe interrupts are routed to the ITS af= ter all. But NetBSD did not have those interrupt problems on the older firmware, whe= re the ECAM workaround was done via PCI quirks. I fetched a generic evbarm = img to test with the current firmware and it looks like NetBSD may now be i= n the same boat as us. https://gist.github.com/agrajag9/daa072b23dbb4cdb9dae899a5b2d01f5 Jon says there's a new build with published sources coming soon, supposedly= with better ECAM support (current is "proof of concept"). Hopefully that h= elps some, but if the problem is actually that everything is behind the SMM= U and we just don't support that at all, then...
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