From owner-freebsd-bugs@FreeBSD.ORG Wed Jul 25 05:40:06 2012 Return-Path: Delivered-To: freebsd-bugs@hub.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 7F0A5106564A for ; Wed, 25 Jul 2012 05:40:06 +0000 (UTC) (envelope-from gnats@FreeBSD.org) Received: from freefall.freebsd.org (freefall.freebsd.org [IPv6:2001:4f8:fff6::28]) by mx1.freebsd.org (Postfix) with ESMTP id 4B25A8FC08 for ; Wed, 25 Jul 2012 05:40:06 +0000 (UTC) Received: from freefall.freebsd.org (localhost [127.0.0.1]) by freefall.freebsd.org (8.14.5/8.14.5) with ESMTP id q6P5e6Tb048625 for ; Wed, 25 Jul 2012 05:40:06 GMT (envelope-from gnats@freefall.freebsd.org) Received: (from gnats@localhost) by freefall.freebsd.org (8.14.5/8.14.5/Submit) id q6P5e6ND048624; Wed, 25 Jul 2012 05:40:06 GMT (envelope-from gnats) Date: Wed, 25 Jul 2012 05:40:06 GMT Message-Id: <201207250540.q6P5e6ND048624@freefall.freebsd.org> To: freebsd-bugs@FreeBSD.org From: Jim Harris Cc: Subject: Re: kern/167106: [eventtimers] eventtimer tsc smp_test unreliable X-BeenThere: freebsd-bugs@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list Reply-To: Jim Harris List-Id: Bug reports List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 25 Jul 2012 05:40:06 -0000 The following reply was made to PR kern/167106; it has been noted by GNATS. From: Jim Harris To: bug-followup@FreeBSD.org, claudius@ambtec.de Cc: Subject: Re: kern/167106: [eventtimers] eventtimer tsc smp_test unreliable Date: Tue, 24 Jul 2012 22:30:31 -0700 I am almost certain kern/167106 is fixed by r238755, committed today. kib@ has already approved this to be MFC'd to stable/9 for upcoming 9.1 release. MFC will happen on Friday (27th July) barring any unforeseen issues with the patch. Full commit message below. Regards, -Jim Author: jimharris Date: Tue Jul 24 22:10:11 2012 New Revision: 238755 URL: http://svn.freebsd.org/changeset/base/238755 Log: Add rmb() to tsc_read_##x to enforce serialization of rdtsc captures. Intel Architecture Manual specifies that rdtsc instruction is not serialized, so without this change, TSC synchronization test would periodically fail, resulting in use of HPET timecounter instead of TSC-low. This caused severe performance degradation (40-50%) when running high IO/s workloads due to HPET MMIO reads and GEOM stat collection. Tests on Xeon E5-2600 (Sandy Bridge) 8C systems were seeing TSC synchronization fail approximately 20% of the time. Sponsored by: Intel Reviewed by: kib MFC after: 3 days Modified: head/sys/x86/x86/tsc.c Modified: head/sys/x86/x86/tsc.c ============================================================================== --- head/sys/x86/x86/tsc.c Tue Jul 24 20:15:41 2012 (r238754) +++ head/sys/x86/x86/tsc.c Tue Jul 24 22:10:11 2012 (r238755) @@ -328,6 +328,7 @@ init_TSC(void) #ifdef SMP +/* rmb is required here because rdtsc is not a serializing instruction. */ #define TSC_READ(x) \ static void \ tsc_read_##x(void *arg) \ @@ -335,6 +336,7 @@ tsc_read_##x(void *arg) \ uint32_t *tsc = arg; \ u_int cpu = PCPU_GET(cpuid); \ \ + rmb(); \ tsc[cpu * 3 + x] = rdtsc32(); \ } TSC_READ(0)