From owner-svn-src-head@freebsd.org Tue Oct 31 22:12:15 2017 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 5738AE3A50B; Tue, 31 Oct 2017 22:12:15 +0000 (UTC) (envelope-from andrew@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 24A00660C9; Tue, 31 Oct 2017 22:12:15 +0000 (UTC) (envelope-from andrew@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v9VMCERr043044; Tue, 31 Oct 2017 22:12:14 GMT (envelope-from andrew@FreeBSD.org) Received: (from andrew@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v9VMCEm7043043; Tue, 31 Oct 2017 22:12:14 GMT (envelope-from andrew@FreeBSD.org) Message-Id: <201710312212.v9VMCEm7043043@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: andrew set sender to andrew@FreeBSD.org using -f From: Andrew Turner Date: Tue, 31 Oct 2017 22:12:14 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r325250 - head/sys/arm64/arm64 X-SVN-Group: head X-SVN-Commit-Author: andrew X-SVN-Commit-Paths: head/sys/arm64/arm64 X-SVN-Commit-Revision: 325250 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 31 Oct 2017 22:12:15 -0000 Author: andrew Date: Tue Oct 31 22:12:14 2017 New Revision: 325250 URL: https://svnweb.freebsd.org/changeset/base/325250 Log: As with r325242 use mp_maxid when iterating over CPUs in the GICv3 driver. Sponsored by: DARPA, AFRL Modified: head/sys/arm64/arm64/gic_v3.c Modified: head/sys/arm64/arm64/gic_v3.c ============================================================================== --- head/sys/arm64/arm64/gic_v3.c Tue Oct 31 21:51:33 2017 (r325249) +++ head/sys/arm64/arm64/gic_v3.c Tue Oct 31 22:12:14 2017 (r325250) @@ -343,7 +343,7 @@ gic_v3_detach(device_t dev) for (rid = 0; rid < (sc->gic_redists.nregions + 1); rid++) bus_release_resource(dev, SYS_RES_MEMORY, rid, sc->gic_res[rid]); - for (i = 0; i < mp_ncpus; i++) + for (i = 0; i <= mp_maxid; i++) free(sc->gic_redists.pcpu[i], M_GIC_V3); free(sc->gic_res, M_GIC_V3); @@ -895,7 +895,7 @@ gic_v3_ipi_send(device_t dev, struct intr_irqsrc *isrc val = 0; /* Iterate through all CPUs in set */ - for (i = 0; i < mp_ncpus; i++) { + for (i = 0; i <= mp_maxid; i++) { /* Move to the next affinity group */ if (aff != GIC_AFFINITY(i)) { /* Send the IPI */ @@ -1103,7 +1103,7 @@ gic_v3_redist_alloc(struct gic_v3_softc *sc) u_int cpuid; /* Allocate struct resource for all CPU's Re-Distributor registers */ - for (cpuid = 0; cpuid < mp_ncpus; cpuid++) + for (cpuid = 0; cpuid <= mp_maxid; cpuid++) if (CPU_ISSET(cpuid, &all_cpus) != 0) sc->gic_redists.pcpu[cpuid] = malloc(sizeof(*sc->gic_redists.pcpu[0]),