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From: "Randall R. Stewart" <rrs@FreeBSD.org>
To: Perforce Change Reviews <perforce@freebsd.org>
Cc: 
Subject: PERFORCE change 136238 for review
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http://perforce.freebsd.org/chv.cgi?CH=136238

Change 136238 by rrs@rrs-mips2-jnpr on 2008/02/26 14:12:37

	Quick hack, disable int's while doing read64/write64 since
	       our 64 bit reg's get trashed by an interrupt.

Affected files ...

.. //depot/projects/mips2-jnpr/src/sys/mips/mips32/octeon32/octeon_pcmap_regs.h#5 edit

Differences ...

==== //depot/projects/mips2-jnpr/src/sys/mips/mips32/octeon32/octeon_pcmap_regs.h#5 (text+ko) ====

@@ -136,7 +136,6 @@
 
 #else
 
-
 /*  ABI o32 */
 
 
@@ -153,7 +152,9 @@
 	uint32_t tmp1;
 	uint32_t tmp2;
 	uint32_t tmp3;
+	uint32_t rupt_state;
 
+	rupt_state = disableintr();
 	__asm __volatile(
 	          ".set mips64\n"
 	          "dsll   %0, %3, 32\n"
@@ -170,6 +171,9 @@
 	    :     "r"(valh), "r"(vall),
 	          "r"(csr_addrh), "r"(csr_addrl)
 	);
+	if (rupt_state) {
+	          enableintr();
+	}
 }
 
 static inline void 
@@ -182,7 +186,9 @@
 	uint32_t tmp1;
 	uint32_t tmp2;
 	uint32_t tmp3;
+	uint32_t rupt_state;
 
+	rupt_state = disableintr();
 	__asm __volatile(
 	          ".set mips64\n"
 	          "dsll   %0, %3, 32\n"
@@ -199,6 +205,9 @@
 	    :     "r"(valh), "r"(vall),
 	          "r"(csr_addrh), "r"(csr_addrl)
 	);
+	if (rupt_state) {
+	          enableintr();
+	}
 }
 
 
@@ -385,7 +394,9 @@
 	uint32_t csr_addrl = csr_addr;
 	uint32_t valh;
 	uint32_t vall;
+	uint32_t rupt_state;
 
+	rupt_state = disableintr();
 	__asm __volatile(
 	          ".set mips64\n"
 	          "dsll   %0, %2, 32\n"
@@ -400,7 +411,9 @@
 	    :     "=&r"(valh), "=&r"(vall)
 	    :     "r"(csr_addrh), "r"(csr_addrl)
 	);
-
+	if (rupt_state) {
+	          enableintr();
+	}
 	return ((uint64_t) valh << 32) | vall;
 }