From owner-cvs-src-old@FreeBSD.ORG Mon Mar 15 18:33:57 2010 Return-Path: Delivered-To: cvs-src-old@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 8126B1065670 for ; Mon, 15 Mar 2010 18:33:56 +0000 (UTC) (envelope-from marius@FreeBSD.org) Received: from repoman.freebsd.org (repoman.freebsd.org [IPv6:2001:4f8:fff6::29]) by mx1.freebsd.org (Postfix) with ESMTP id 6F25F8FC15 for ; Mon, 15 Mar 2010 18:33:56 +0000 (UTC) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.14.3/8.14.3) with ESMTP id o2FIXu4N078534 for ; Mon, 15 Mar 2010 18:33:56 GMT (envelope-from marius@repoman.freebsd.org) Received: (from svn2cvs@localhost) by repoman.freebsd.org (8.14.3/8.14.3/Submit) id o2FIXuAn078533 for cvs-src-old@freebsd.org; Mon, 15 Mar 2010 18:33:56 GMT (envelope-from marius@repoman.freebsd.org) Message-Id: <201003151833.o2FIXuAn078533@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: svn2cvs set sender to marius@repoman.freebsd.org using -f From: Marius Strobl Date: Mon, 15 Mar 2010 18:33:32 +0000 (UTC) To: cvs-src-old@freebsd.org X-FreeBSD-CVS-Branch: RELENG_6 Subject: cvs commit: src/lib/libc/sparc64/fpu fpu.c fpu_emu.h X-BeenThere: cvs-src-old@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: **OBSOLETE** CVS commit messages for the src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 15 Mar 2010 18:33:57 -0000 marius 2010-03-15 18:33:32 UTC FreeBSD src repository Modified files: (Branch: RELENG_6) lib/libc/sparc64/fpu fpu.c fpu_emu.h Log: SVN rev 205185 on 2010-03-15 18:33:32Z by marius MFC: r204974, r205002 - The OPSZ macro actually only does the right thing for int32 and int64 operands but not for double and extended double ones. Instead of trying to fix the macro just nuke it and unroll the loops in the correct way though as extended double operands turn out to be the only special case. - For FxTO{s,d,q} the source operand is int64 so rs2 has to be re-decoded after setting type accordingly as it's generally decoded using the low 2 bits as the type, which are 0 for these three instructions. - Similarly, in case of F{s,d,q}TOx the target is int64 so rd has to be re-decoded using not only the operand mask appropriate for int64 but also the correct register number encoding. - Use const where appropriate. - Wrap long lines. Submitted by: Peter Jeremy (partly) Revision Changes Path 1.8.8.1 +20 -28 src/lib/libc/sparc64/fpu/fpu.c 1.4.14.1 +1 -1 src/lib/libc/sparc64/fpu/fpu_emu.h