From owner-freebsd-arch@FreeBSD.ORG Thu Jun 12 11:54:44 2003 Return-Path: Delivered-To: freebsd-arch@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 5958037B4B3 for ; Thu, 12 Jun 2003 11:54:43 -0700 (PDT) Received: from ns1.xcllnt.net (209-128-86-226.bayarea.net [209.128.86.226]) by mx1.FreeBSD.org (Postfix) with ESMTP id 8E25843F75 for ; Thu, 12 Jun 2003 11:54:41 -0700 (PDT) (envelope-from marcel@xcllnt.net) Received: from athlon.pn.xcllnt.net (athlon.pn.xcllnt.net [192.168.4.3]) by ns1.xcllnt.net (8.12.9/8.12.9) with ESMTP id h5CIsdhS028213; Thu, 12 Jun 2003 11:54:39 -0700 (PDT) (envelope-from marcel@piii.pn.xcllnt.net) Received: from athlon.pn.xcllnt.net (localhost [127.0.0.1]) by athlon.pn.xcllnt.net (8.12.9/8.12.9) with ESMTP id h5CIsdK4000564; Thu, 12 Jun 2003 11:54:39 -0700 (PDT) (envelope-from marcel@athlon.pn.xcllnt.net) Received: (from marcel@localhost) by athlon.pn.xcllnt.net (8.12.9/8.12.9/Submit) id h5CIsdBZ000563; Thu, 12 Jun 2003 11:54:39 -0700 (PDT) Date: Thu, 12 Jun 2003 11:54:39 -0700 From: Marcel Moolenaar To: Jeff Roberson Message-ID: <20030612185439.GA543@athlon.pn.xcllnt.net> References: <20030612180335.GA36606@dhcp01.pn.xcllnt.net> <20030612142802.W36168-100000@mail.chesapeake.net> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20030612142802.W36168-100000@mail.chesapeake.net> User-Agent: Mutt/1.5.4i cc: arch@freebsd.org cc: Poul-Henning Kamp Subject: Re: HyperThreading and CPU topologies. X-BeenThere: freebsd-arch@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: Discussion related to FreeBSD architecture List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 12 Jun 2003 18:54:44 -0000 On Thu, Jun 12, 2003 at 02:28:52PM -0400, Jeff Roberson wrote: > > On Thu, 12 Jun 2003, Marcel Moolenaar wrote: > > > On Thu, Jun 12, 2003 at 01:45:52PM +0200, Poul-Henning Kamp wrote: > > > In message <20030612051553.J36168-100000@mail.chesapeake.net>, Jeff Roberson wr > > > ites: > > > >Index: smp.h > > > >=================================================================== > > > >RCS file: /home/ncvs/src/sys/sys/smp.h,v > > > >retrieving revision 1.72 > > > >diff -r1.72 smp.h > > > >19a20,46 > > > >> > > > >> /* > > > >> * Topology of a NUMA or HTT system. > > > >> * > > > >> * The top level topology is an array of pointers to groups. Each group > > > >> * contains a bitmask of cpus in its group or subgroups. It may also > > > >> * contain a pointer to an array of child groups. > > > >> * > > > >> * The bitmasks at non leaf groups may be used by consumers who support > > > >> * a smaller depth than the hardware provides. > > > >> * > > > >> * The topology may be omitted by systems where all CPUs are equal. > > > >> */ > > > >> > > > >> struct cpu_group { > > > >> int cg_mask; /* Mask of cpus in this group. */ > > > > > > u_int ? > > > > > > uint32_t ? > > > > It's best to make it MD depedendent. I prefer 64-bit masks in ia64. > > > > I thought I was being consistent with the rest of the file but it turns > out that it uses u_int so I'm changing to that. If someone wants to make > a pass through the smp code and make a cpu_bitmap_t or something they are > welcome. I have this on my radar for a while. Mostly because of the PCPU masks. It's not urgent, so the sweep will not happen anytime soon. Hence, it's also not a problem if you favor consistency for now. -- Marcel Moolenaar USPA: A-39004 marcel@xcllnt.net