Date: Wed, 31 Jan 2018 16:56:02 +0000 (UTC) From: Konstantin Belousov <kib@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r328628 - head/sys/amd64/amd64 Message-ID: <201801311656.w0VGu2YD004976@repo.freebsd.org>
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Author: kib Date: Wed Jan 31 16:56:02 2018 New Revision: 328628 URL: https://svnweb.freebsd.org/changeset/base/328628 Log: When switching IBRS on, also enable STIBP (Single Thread Indirect Branch Predictors) mitigation. DOcument 336996-001 promises that CPUs which implement IBRS but not STIBP silently ignore setting of the bit instead of trapping. Sponsored by: The FreeBSD Foundation MFC after: 1 week Modified: head/sys/amd64/amd64/support.S Modified: head/sys/amd64/amd64/support.S ============================================================================== --- head/sys/amd64/amd64/support.S Wed Jan 31 16:54:05 2018 (r328627) +++ head/sys/amd64/amd64/support.S Wed Jan 31 16:56:02 2018 (r328628) @@ -875,8 +875,8 @@ ENTRY(handle_ibrs_entry) cmpb $0,hw_ibrs_active(%rip) je 1f movl $MSR_IA32_SPEC_CTRL,%ecx - movl $IA32_SPEC_CTRL_IBRS,%eax - movl $IA32_SPEC_CTRL_IBRS>>32,%edx + movl $(IA32_SPEC_CTRL_IBRS|IA32_SPEC_CTRL_STIBP),%eax + movl $(IA32_SPEC_CTRL_IBRS|IA32_SPEC_CTRL_STIBP)>>32,%edx wrmsr movb $1,PCPU(IBPB_SET) testl $CPUID_STDEXT_SMEP,cpu_stdext_feature(%rip)
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