From owner-svn-src-all@FreeBSD.ORG Sun May 8 05:25:43 2011 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 35DDC106566C; Sun, 8 May 2011 05:25:43 +0000 (UTC) (envelope-from adrian@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 0B20B8FC12; Sun, 8 May 2011 05:25:43 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id p485PgFE030654; Sun, 8 May 2011 05:25:42 GMT (envelope-from adrian@svn.freebsd.org) Received: (from adrian@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id p485PgSL030651; Sun, 8 May 2011 05:25:42 GMT (envelope-from adrian@svn.freebsd.org) Message-Id: <201105080525.p485PgSL030651@svn.freebsd.org> From: Adrian Chadd Date: Sun, 8 May 2011 05:25:42 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r221617 - head/sys/dev/ath/ath_hal/ar5416 X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 08 May 2011 05:25:43 -0000 Author: adrian Date: Sun May 8 05:25:42 2011 New Revision: 221617 URL: http://svn.freebsd.org/changeset/base/221617 Log: * Add in a comment about ar5416InitUserSettings() potentially modifying AR_DIAG_SW. There's a hardware workaround which sets disabling some errors early at startup and clears said bits before the PCU begins receiving - it does this to avoid RX descriptor status errors. It's possible these bits aren't being completely properly twiddled in all instances; but in particular if the diag_reg HAL variable is set it won't be setting these bits correctly. I'll review this at some point. * Disable multicast search on mac address and key id - the driver doesn't use it at the moment and thus adhoc may be broken for merlin and later. * Change this to be for Merlin 1.0 (which from what I understand wasn't ever publicly released) to be more correct. Modified: head/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c head/sys/dev/ath/ath_hal/ar5416/ar5416reg.h Modified: head/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c ============================================================================== --- head/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c Sun May 8 03:24:17 2011 (r221616) +++ head/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c Sun May 8 05:25:42 2011 (r221617) @@ -286,6 +286,7 @@ ar5416Reset(struct ath_hal *ah, HAL_OPMO ar5416InitIMR(ah, opmode); ar5212SetCoverageClass(ah, AH_PRIVATE(ah)->ah_coverageClass, 1); ar5416InitQoS(ah); + /* This may override the AR_DIAG_SW register */ ar5416InitUserSettings(ah); /* @@ -2508,8 +2509,9 @@ ar5416OverrideIni(struct ath_hal *ah, co */ OS_REG_SET_BIT(ah, AR_DIAG_SW, (AR_DIAG_RX_DIS | AR_DIAG_RX_ABORT)); - if (AR_SREV_MERLIN_20_OR_LATER(ah)) { + if (AR_SREV_MERLIN_10_OR_LATER(ah)) { val = OS_REG_READ(ah, AR_PCU_MISC_MODE2); + val &= (~AR_PCU_MISC_MODE2_ADHOC_MCAST_KEYID_ENABLE); if (!AR_SREV_9271(ah)) val &= ~AR_PCU_MISC_MODE2_HWWAR1; Modified: head/sys/dev/ath/ath_hal/ar5416/ar5416reg.h ============================================================================== --- head/sys/dev/ath/ath_hal/ar5416/ar5416reg.h Sun May 8 03:24:17 2011 (r221616) +++ head/sys/dev/ath/ath_hal/ar5416/ar5416reg.h Sun May 8 05:25:42 2011 (r221617) @@ -535,6 +535,12 @@ #define AR_PCU_MISC_MODE2_MGMT_CRYPTO_ENABLE 0x00000002 #define AR_PCU_MISC_MODE2_NO_CRYPTO_FOR_NON_DATA_PKT 0x00000004 +/* + * This bit enables the Multicast search based on both MAC Address and Key ID. + * If bit is 0, then Multicast search is based on MAC address only. + * For Merlin and above only. + */ +#define AR_PCU_MISC_MODE2_ADHOC_MCAST_KEYID_ENABLE 0x00000040 #define AR_PCU_MISC_MODE2_HWWAR1 0x00100000 #define AR_PCU_MISC_MODE2_HWWAR2 0x02000000