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From: Adrian Chadd <adrian@freebsd.org>
To: "Jayachandran C." <jchandra@freebsd.org>
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Cc: svn-src-head@freebsd.org, svn-src-all@freebsd.org,
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Subject: Re: svn commit: r225892 - head/sys/mips/mips
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.. and somehow linux mips code does do a variety of WAIT-y things; how
is it they don't have the interrupt handling issues we do?
Is it because they're doing preemption? If so, how do they accurately
handle hz clock pulses when an interrupt may preempt things just
before that wait instruction occurs?


Adrian