From owner-svn-src-all@freebsd.org Thu Mar 26 17:27:46 2020 Return-Path: Delivered-To: svn-src-all@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id CD8012A4F11; Thu, 26 Mar 2020 17:27:46 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) server-signature RSA-PSS (4096 bits) client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 48pBl56P8dz3Np3; Thu, 26 Mar 2020 17:27:45 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 2DF649D88; Thu, 26 Mar 2020 17:27:42 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id 02QHRfef008880; Thu, 26 Mar 2020 17:27:41 GMT (envelope-from dim@FreeBSD.org) Received: (from dim@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id 02QHRfE1008879; Thu, 26 Mar 2020 17:27:41 GMT (envelope-from dim@FreeBSD.org) Message-Id: <202003261727.02QHRfE1008879@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: dim set sender to dim@FreeBSD.org using -f From: Dimitry Andric Date: Thu, 26 Mar 2020 17:27:41 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r359333 - head/contrib/llvm-project/llvm/lib/Target/PowerPC X-SVN-Group: head X-SVN-Commit-Author: dim X-SVN-Commit-Paths: head/contrib/llvm-project/llvm/lib/Target/PowerPC X-SVN-Commit-Revision: 359333 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 26 Mar 2020 17:27:47 -0000 Author: dim Date: Thu Mar 26 17:27:41 2020 New Revision: 359333 URL: https://svnweb.freebsd.org/changeset/base/359333 Log: Merge commit f0990e104 from llvm git (by Justin Hibbits): [PowerPC]: e500 target can't use lwsync, use msync instead The e500 core has a silicon bug that triggers an illegal instruction program trap on any sync other than msync. Other cores will typically ignore illegal sync types, and the documentation even implies that the 'illegal' bits are ignored. Address this hardware deficiency by only using msync, like the PPC440. Differential Revision: https://reviews.llvm.org/D76614 Requested by: jhibbits MFC after: 6 weeks X-MFC-With: 358851 Modified: head/contrib/llvm-project/llvm/lib/Target/PowerPC/PPC.td Modified: head/contrib/llvm-project/llvm/lib/Target/PowerPC/PPC.td ============================================================================== --- head/contrib/llvm-project/llvm/lib/Target/PowerPC/PPC.td Thu Mar 26 17:12:55 2020 (r359332) +++ head/contrib/llvm-project/llvm/lib/Target/PowerPC/PPC.td Thu Mar 26 17:27:41 2020 (r359333) @@ -442,7 +442,7 @@ def : ProcessorModel<"g5", G5Model, def : ProcessorModel<"e500", PPCE500Model, [DirectiveE500, FeatureICBT, FeatureBookE, - FeatureISEL, FeatureMFTB, FeatureSPE]>; + FeatureISEL, FeatureMFTB, FeatureMSYNC, FeatureSPE]>; def : ProcessorModel<"e500mc", PPCE500mcModel, [DirectiveE500mc, FeatureSTFIWX, FeatureICBT, FeatureBookE,