From nobody Tue Oct 24 19:26:01 2023 X-Original-To: dev-commits-src-branches@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4SFMVL2MG2z4yPVv; Tue, 24 Oct 2023 19:26:02 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4SFMVK57h0z4Nd8; Tue, 24 Oct 2023 19:26:01 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1698175561; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=IKLifxylu6QMTTAnZzk7FlsB6EW0lxEwjYCGa2wtrBw=; b=EU/A4CLOpYAdtuLSOhKj7Oh/G3QvQuBOIpPsn7tLYHjziCJINBBOJUOr8cbt9DHaeW+NjN hsqfZNL/HS85AXbkYFXztnStYHM+tEiesKlvQtf1szdw0F/zDyhcQ2Lvk1rioDn2biq8RH 6CbFmJF4GTrl+I0btHAboxsPWs8vaI7cXGo9NnfL4vuylDNLIbOMrS56mWrVET9+AIU9pF RBwsf1wrwwmObujCr2GYzQjcvhEujGLkyqVfbbx/8SRTprPVto80UHskQWxXsI/FGUrIWg UiGLfYjK7332vWog6oQZc3ubgKXY4CrhnCjECoePwhmd8wYg/I4BU7lbpFnw5w== ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1698175561; a=rsa-sha256; cv=none; b=ZvNgwE2IGFlTbnHnnxnQ0HxQvbChC3lydHUNgqBg7cgc/SEmo+hsppnF0qzfXSpWfZec88 nLzCsty+k6XGE/6lMqwC7uKg/6rq4w3uVJX4IkSl4TUMbdKzQK9fh4HN+7hfLTtYPgyj+a svuHdlPgG/h4ntAL079g/5NtIUUSyKX+nQh2NP7szEJqz3GLsyxH3uZLhqQLqU/pmTi6iz GpnRmj39PAb9PnqJkwguJ8/DI4iI9GnmGWaUjOWzYUzC2ppJ2RP8zGG6wjmVwtBRfhZUUl p2hc8QnSpfeU0k4RfFPICuoaKGlLJmrUaNuKCOE8GA6lCu1U/QPsUcsEFtDWRw== ARC-Authentication-Results: i=1; mx1.freebsd.org; none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1698175561; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=IKLifxylu6QMTTAnZzk7FlsB6EW0lxEwjYCGa2wtrBw=; b=kNfwLjNVuJ8genp0tflym2YazZXLXm7jcuqsbKCLMJ5nHowEYNDIbeAWsiT6tz81i7s/Qa J5br4QFIWzvEND2mf/ejWOSdPpBHdeguAzv2Th1QF8cciO0+ZBGYZnIWXS2nnql6ZlQvqk 4k+f+wLfUuvK975iFf6tpp4fXZqodZ0i51r5HApFjWzFzPsMFAjS8ApBoXPlRh58g7ElhH Z+PlgMVr2aOnCYQ/CYjCtT/Jm0nk/5jZyjzNpw0DyCazF5w96avLriE0d9iskyViz4gGb4 Otv1Unr3IKs+hScgRnHOhZzrDqlNvEZqL9iNvBNkxDXz5LEHIPCwyE0rXTfifQ== Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 4SFMVK49DRzb5w; Tue, 24 Oct 2023 19:26:01 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org ([127.0.1.44]) by gitrepo.freebsd.org (8.17.1/8.17.1) with ESMTP id 39OJQ1eb074734; Tue, 24 Oct 2023 19:26:01 GMT (envelope-from git@gitrepo.freebsd.org) Received: (from git@localhost) by gitrepo.freebsd.org (8.17.1/8.17.1/Submit) id 39OJQ1JU074731; Tue, 24 Oct 2023 19:26:01 GMT (envelope-from git) Date: Tue, 24 Oct 2023 19:26:01 GMT Message-Id: <202310241926.39OJQ1JU074731@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org From: John Baldwin Subject: git: 0e496388ef1b - stable/14 - x86 msi: Enable/disable IDT vectors for MSI groups all at once List-Id: Commits to the stable branches of the FreeBSD src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-branches List-Help: List-Post: List-Subscribe: List-Unsubscribe: Sender: owner-dev-commits-src-branches@freebsd.org X-BeenThere: dev-commits-src-branches@freebsd.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: jhb X-Git-Repository: src X-Git-Refname: refs/heads/stable/14 X-Git-Reftype: branch X-Git-Commit: 0e496388ef1bc9001378201bf8af2115d8739500 Auto-Submitted: auto-generated The branch stable/14 has been updated by jhb: URL: https://cgit.FreeBSD.org/src/commit/?id=0e496388ef1bc9001378201bf8af2115d8739500 commit 0e496388ef1bc9001378201bf8af2115d8739500 Author: John Baldwin AuthorDate: 2023-10-20 21:52:38 +0000 Commit: John Baldwin CommitDate: 2023-10-24 19:09:23 +0000 x86 msi: Enable/disable IDT vectors for MSI groups all at once Unlike MSI-X, when a device uses multiple MSI interrupts, the entire group of interrupts are enabled/disabled at once in the relevant PCI config register. Currently, the interrupt code enables the IDT vector for each MSI interrupt when a handler is first registered. If the PCI device triggers an MSI interrupt which doesn't yet have a handler, this can trigger a panic when the Xrsvd ISR executes rather than treating it as a stray device interrupt. To fix, enable all the IDT vectors for an MSI group when the first interrupt handler is configured, and don't disable the IDT vectors until the last interrupt handler for the group is torn down. When migrating an MSI group between CPUs, enable/disable the entire group of IDT vectors if at least one interrupt handler is configured for the group. Reported by: jhay Reviewed by: kib Differential Revision: https://reviews.freebsd.org/D42232 (cherry picked from commit 2d4924892144f653a7a7afba27ed1bf536dd7e51) --- sys/x86/x86/msi.c | 34 ++++++++++++++++++++-------------- 1 file changed, 20 insertions(+), 14 deletions(-) diff --git a/sys/x86/x86/msi.c b/sys/x86/x86/msi.c index 7f4d87c09453..246645efbc10 100644 --- a/sys/x86/x86/msi.c +++ b/sys/x86/x86/msi.c @@ -120,6 +120,7 @@ struct msi_intsrc { u_int msi_cpu; /* Local APIC ID. (g) */ u_int msi_count:8; /* Messages in this group. (g) */ u_int msi_maxcount:8; /* Alignment for this group. (g) */ + u_int msi_enabled:8; /* Enabled messages in this group. (g) */ u_int *msi_irqs; /* Group's IRQ list. (g) */ u_int msi_remap_cookie; }; @@ -204,7 +205,12 @@ msi_enable_intr(struct intsrc *isrc) { struct msi_intsrc *msi = (struct msi_intsrc *)isrc; - apic_enable_vector(msi->msi_cpu, msi->msi_vector); + msi = msi->msi_first; + if (msi->msi_enabled == 0) { + for (u_int i = 0; i < msi->msi_count; i++) + apic_enable_vector(msi->msi_cpu, msi->msi_vector + i); + } + msi->msi_enabled++; } static void @@ -212,7 +218,12 @@ msi_disable_intr(struct intsrc *isrc) { struct msi_intsrc *msi = (struct msi_intsrc *)isrc; - apic_disable_vector(msi->msi_cpu, msi->msi_vector); + msi = msi->msi_first; + msi->msi_enabled--; + if (msi->msi_enabled == 0) { + for (u_int i = 0; i < msi->msi_count; i++) + apic_disable_vector(msi->msi_cpu, msi->msi_vector + i); + } } static int @@ -277,11 +288,8 @@ msi_assign_cpu(struct intsrc *isrc, u_int apic_id) /* Must be set before BUS_REMAP_INTR as it may call back into MSI. */ msi->msi_cpu = apic_id; msi->msi_vector = vector; - if (msi->msi_intsrc.is_handlers > 0) - apic_enable_vector(msi->msi_cpu, msi->msi_vector); - for (i = 1; i < msi->msi_count; i++) { - sib = (struct msi_intsrc *)intr_lookup_source(msi->msi_irqs[i]); - if (sib->msi_intsrc.is_handlers > 0) + if (msi->msi_enabled > 0) { + for (i = 0; i < msi->msi_count; i++) apic_enable_vector(apic_id, vector + i); } error = BUS_REMAP_INTR(device_get_parent(msi->msi_dev), msi->msi_dev, @@ -317,15 +325,13 @@ msi_assign_cpu(struct intsrc *isrc, u_int apic_id) * to prevent races where we could miss an interrupt. If BUS_REMAP_INTR * failed then we disable and free the new, unused vector(s). */ - if (msi->msi_intsrc.is_handlers > 0) - apic_disable_vector(old_id, old_vector); - apic_free_vector(old_id, old_vector, msi->msi_irq); - for (i = 1; i < msi->msi_count; i++) { - sib = (struct msi_intsrc *)intr_lookup_source(msi->msi_irqs[i]); - if (sib->msi_intsrc.is_handlers > 0) + if (msi->msi_enabled > 0) { + for (i = 0; i < msi->msi_count; i++) apic_disable_vector(old_id, old_vector + i); - apic_free_vector(old_id, old_vector + i, msi->msi_irqs[i]); } + apic_free_vector(old_id, old_vector, msi->msi_irq); + for (i = 1; i < msi->msi_count; i++) + apic_free_vector(old_id, old_vector + i, msi->msi_irqs[i]); return (error); }