Date: Wed, 31 Jan 2018 17:36:40 +0000 (UTC) From: John Baldwin <jhb@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r328629 - in head: lib/libc/mips/gen sys/mips/include sys/mips/mips Message-ID: <201801311736.w0VHaeii024678@repo.freebsd.org>
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Author: jhb Date: Wed Jan 31 17:36:39 2018 New Revision: 328629 URL: https://svnweb.freebsd.org/changeset/base/328629 Log: Consistently use 16-byte alignment for MIPS N32 and N64. - Add a new <machine/abi.h> header to hold constants shared between C and assembly such as CALLFRAME_SZ. - Add a new STACK_ALIGN constant to <machine/abi.h> and use it to replace hardcoded constants in the kernel and makecontext(). As a result of this, ensure the stack pointer on N32 and N64 is 16-byte aligned for N32 and N64 after exec(), after pthread_create(), and when sending signals rather than 8-byte aligned. Reviewed by: jmallett Sponsored by: DARPA / AFRL Differential Revision: https://reviews.freebsd.org/D13875 Added: head/sys/mips/include/abi.h - copied, changed from r328626, head/sys/mips/include/asm.h Modified: head/lib/libc/mips/gen/makecontext.c head/sys/mips/include/asm.h head/sys/mips/mips/pm_machdep.c head/sys/mips/mips/vm_machdep.c Modified: head/lib/libc/mips/gen/makecontext.c ============================================================================== --- head/lib/libc/mips/gen/makecontext.c Wed Jan 31 16:56:02 2018 (r328628) +++ head/lib/libc/mips/gen/makecontext.c Wed Jan 31 17:36:39 2018 (r328629) @@ -38,6 +38,7 @@ __RCSID("$NetBSD: makecontext.c,v 1.5 2009/12/14 01:07 #endif #include <sys/param.h> +#include <machine/abi.h> #include <machine/regnum.h> #include <stdarg.h> @@ -75,13 +76,10 @@ __makecontext(ucontext_t *ucp, void (*func)(void), int ((uintptr_t)ucp->uc_stack.ss_sp + ucp->uc_stack.ss_size); #if defined(__mips_o32) || defined(__mips_o64) sp -= (argc >= 4 ? argc : 4); /* Make room for >=4 arguments. */ - sp = (register_t *) - ((uintptr_t)sp & ~0x7); /* Align on double-word boundary. */ #elif defined(__mips_n32) || defined(__mips_n64) sp -= (argc > 8 ? argc - 8 : 0); /* Make room for > 8 arguments. */ - sp = (register_t *) - ((uintptr_t)sp & ~0xf); /* Align on quad-word boundary. */ #endif + sp = (register_t *)((uintptr_t)sp & ~(STACK_ALIGN - 1)); mc->mc_regs[SP] = (intptr_t)sp; mc->mc_regs[S0] = (intptr_t)ucp; Copied and modified: head/sys/mips/include/abi.h (from r328626, head/sys/mips/include/asm.h) ============================================================================== --- head/sys/mips/include/asm.h Wed Jan 31 14:44:51 2018 (r328626, copy source) +++ head/sys/mips/include/abi.h Wed Jan 31 17:36:39 2018 (r328629) @@ -55,214 +55,9 @@ * v 1.2 89/08/15 18:28:24 rab Exp SPRITE (DECWRL) */ -#ifndef _MACHINE_ASM_H_ -#define _MACHINE_ASM_H_ +#ifndef _MACHINE_ABI_H_ +#define _MACHINE_ABI_H_ -#include <machine/regdef.h> -#include <machine/endian.h> -#include <machine/cdefs.h> - -#undef __FBSDID -#if !defined(lint) && !defined(STRIP_FBSDID) -#define __FBSDID(s) .ident s -#else -#define __FBSDID(s) /* nothing */ -#endif - -/* - * Define -pg profile entry code. - * Must always be noreorder, must never use a macro instruction - * Final addiu to t9 must always equal the size of this _KERN_MCOUNT - */ -#define _KERN_MCOUNT \ - .set push; \ - .set noreorder; \ - .set noat; \ - subu sp,sp,16; \ - sw t9,12(sp); \ - move AT,ra; \ - lui t9,%hi(_mcount); \ - addiu t9,t9,%lo(_mcount); \ - jalr t9; \ - nop; \ - lw t9,4(sp); \ - addiu sp,sp,8; \ - addiu t9,t9,40; \ - .set pop; - -#ifdef GPROF -#define MCOUNT _KERN_MCOUNT -#else -#define MCOUNT -#endif - -#define _C_LABEL(x) x - -#ifdef USE_AENT -#define AENT(x) \ - .aent x, 0 -#else -#define AENT(x) -#endif - -/* - * WARN_REFERENCES: create a warning if the specified symbol is referenced - */ -#define WARN_REFERENCES(_sym,_msg) \ - .section .gnu.warning. ## _sym ; .ascii _msg ; .text - -#ifdef __ELF__ -# define _C_LABEL(x) x -#else -# define _C_LABEL(x) _ ## x -#endif - -/* - * WEAK_ALIAS: create a weak alias. - */ -#define WEAK_ALIAS(alias,sym) \ - .weak alias; \ - alias = sym - -/* - * STRONG_ALIAS: create a strong alias. - */ -#define STRONG_ALIAS(alias,sym) \ - .globl alias; \ - alias = sym - -#define GLOBAL(sym) \ - .globl sym; sym: - -#define ENTRY(sym) \ - .text; .globl sym; .ent sym; sym: - -#define ASM_ENTRY(sym) \ - .text; .globl sym; .type sym,@function; sym: - -/* - * LEAF - * A leaf routine does - * - call no other function, - * - never use any register that callee-saved (S0-S8), and - * - not use any local stack storage. - */ -#define LEAF(x) \ - .globl _C_LABEL(x); \ - .ent _C_LABEL(x), 0; \ -_C_LABEL(x): ; \ - .frame sp, 0, ra; \ - MCOUNT - -/* - * LEAF_NOPROFILE - * No profilable leaf routine. - */ -#define LEAF_NOPROFILE(x) \ - .globl _C_LABEL(x); \ - .ent _C_LABEL(x), 0; \ -_C_LABEL(x): ; \ - .frame sp, 0, ra - -/* - * XLEAF - * declare alternate entry to leaf routine - */ -#define XLEAF(x) \ - .globl _C_LABEL(x); \ - AENT (_C_LABEL(x)); \ -_C_LABEL(x): - -/* - * NESTED - * A function calls other functions and needs - * therefore stack space to save/restore registers. - */ -#define NESTED(x, fsize, retpc) \ - .globl _C_LABEL(x); \ - .ent _C_LABEL(x), 0; \ -_C_LABEL(x): ; \ - .frame sp, fsize, retpc; \ - MCOUNT - -/* - * NESTED_NOPROFILE(x) - * No profilable nested routine. - */ -#define NESTED_NOPROFILE(x, fsize, retpc) \ - .globl _C_LABEL(x); \ - .ent _C_LABEL(x), 0; \ -_C_LABEL(x): ; \ - .frame sp, fsize, retpc - -/* - * XNESTED - * declare alternate entry point to nested routine. - */ -#define XNESTED(x) \ - .globl _C_LABEL(x); \ - AENT (_C_LABEL(x)); \ -_C_LABEL(x): - -/* - * END - * Mark end of a procedure. - */ -#define END(x) \ - .end _C_LABEL(x) - -/* - * IMPORT -- import external symbol - */ -#define IMPORT(sym, size) \ - .extern _C_LABEL(sym),size - -/* - * EXPORT -- export definition of symbol - */ -#define EXPORT(x) \ - .globl _C_LABEL(x); \ -_C_LABEL(x): - -/* - * VECTOR - * exception vector entrypoint - * XXX: regmask should be used to generate .mask - */ -#define VECTOR(x, regmask) \ - .ent _C_LABEL(x),0; \ - EXPORT(x); \ - -#define VECTOR_END(x) \ - EXPORT(x ## End); \ - END(x) - -/* - * Macros to panic and printf from assembly language. - */ -#define PANIC(msg) \ - PTR_LA a0, 9f; \ - jal _C_LABEL(panic); \ - nop; \ - MSG(msg) - -#define PANIC_KSEG0(msg, reg) PANIC(msg) - -#define PRINTF(msg) \ - PTR_LA a0, 9f; \ - jal _C_LABEL(printf); \ - nop; \ - MSG(msg) - -#define MSG(msg) \ - .rdata; \ -9: .asciiz msg; \ - .text - -#define ASMSTR(str) \ - .asciiz str; \ - .align 3 - #if defined(__mips_o32) #define SZREG 4 #else @@ -270,17 +65,9 @@ _C_LABEL(x): #endif #if defined(__mips_o32) || defined(__mips_o64) -#define ALSK 7 /* stack alignment */ -#define ALMASK -7 /* stack alignment */ -#define SZFPREG 4 -#define FP_L lwc1 -#define FP_S swc1 +#define STACK_ALIGN 8 #else -#define ALSK 15 /* stack alignment */ -#define ALMASK -15 /* stack alignment */ -#define SZFPREG 8 -#define FP_L ldc1 -#define FP_S sdc1 +#define STACK_ALIGN 16 #endif /* @@ -305,409 +92,4 @@ _C_LABEL(x): #define CALLFRAME_SP (CALLFRAME_SIZ - 2 * SZREG) #define CALLFRAME_RA (CALLFRAME_SIZ - 1 * SZREG) -/* - * Endian-independent assembly-code aliases for unaligned memory accesses. - */ -#if _BYTE_ORDER == _LITTLE_ENDIAN -# define LWHI lwr -# define LWLO lwl -# define SWHI swr -# define SWLO swl -# if SZREG == 4 -# define REG_LHI lwr -# define REG_LLO lwl -# define REG_SHI swr -# define REG_SLO swl -# else -# define REG_LHI ldr -# define REG_LLO ldl -# define REG_SHI sdr -# define REG_SLO sdl -# endif -#endif - -#if _BYTE_ORDER == _BIG_ENDIAN -# define LWHI lwl -# define LWLO lwr -# define SWHI swl -# define SWLO swr -# if SZREG == 4 -# define REG_LHI lwl -# define REG_LLO lwr -# define REG_SHI swl -# define REG_SLO swr -# else -# define REG_LHI ldl -# define REG_LLO ldr -# define REG_SHI sdl -# define REG_SLO sdr -# endif -#endif - -/* - * While it would be nice to be compatible with the SGI - * REG_L and REG_S macros, because they do not take parameters, it - * is impossible to use them with the _MIPS_SIM_ABIX32 model. - * - * These macros hide the use of mips3 instructions from the - * assembler to prevent the assembler from generating 64-bit style - * ABI calls. - */ -#if _MIPS_SZPTR == 32 -#define PTR_ADD add -#define PTR_ADDI addi -#define PTR_ADDU addu -#define PTR_ADDIU addiu -#define PTR_SUB add -#define PTR_SUBI subi -#define PTR_SUBU subu -#define PTR_SUBIU subu -#define PTR_L lw -#define PTR_LA la -#define PTR_LI li -#define PTR_S sw -#define PTR_SLL sll -#define PTR_SLLV sllv -#define PTR_SRL srl -#define PTR_SRLV srlv -#define PTR_SRA sra -#define PTR_SRAV srav -#define PTR_LL ll -#define PTR_SC sc -#define PTR_WORD .word -#define PTR_SCALESHIFT 2 -#else /* _MIPS_SZPTR == 64 */ -#define PTR_ADD dadd -#define PTR_ADDI daddi -#define PTR_ADDU daddu -#define PTR_ADDIU daddiu -#define PTR_SUB dadd -#define PTR_SUBI dsubi -#define PTR_SUBU dsubu -#define PTR_SUBIU dsubu -#define PTR_L ld -#define PTR_LA dla -#define PTR_LI dli -#define PTR_S sd -#define PTR_SLL dsll -#define PTR_SLLV dsllv -#define PTR_SRL dsrl -#define PTR_SRLV dsrlv -#define PTR_SRA dsra -#define PTR_SRAV dsrav -#define PTR_LL lld -#define PTR_SC scd -#define PTR_WORD .dword -#define PTR_SCALESHIFT 3 -#endif /* _MIPS_SZPTR == 64 */ - -#if _MIPS_SZINT == 32 -#define INT_ADD add -#define INT_ADDI addi -#define INT_ADDU addu -#define INT_ADDIU addiu -#define INT_SUB add -#define INT_SUBI subi -#define INT_SUBU subu -#define INT_SUBIU subu -#define INT_L lw -#define INT_LA la -#define INT_S sw -#define INT_SLL sll -#define INT_SLLV sllv -#define INT_SRL srl -#define INT_SRLV srlv -#define INT_SRA sra -#define INT_SRAV srav -#define INT_LL ll -#define INT_SC sc -#define INT_WORD .word -#define INT_SCALESHIFT 2 -#else -#define INT_ADD dadd -#define INT_ADDI daddi -#define INT_ADDU daddu -#define INT_ADDIU daddiu -#define INT_SUB dadd -#define INT_SUBI dsubi -#define INT_SUBU dsubu -#define INT_SUBIU dsubu -#define INT_L ld -#define INT_LA dla -#define INT_S sd -#define INT_SLL dsll -#define INT_SLLV dsllv -#define INT_SRL dsrl -#define INT_SRLV dsrlv -#define INT_SRA dsra -#define INT_SRAV dsrav -#define INT_LL lld -#define INT_SC scd -#define INT_WORD .dword -#define INT_SCALESHIFT 3 -#endif - -#if _MIPS_SZLONG == 32 -#define LONG_ADD add -#define LONG_ADDI addi -#define LONG_ADDU addu -#define LONG_ADDIU addiu -#define LONG_SUB add -#define LONG_SUBI subi -#define LONG_SUBU subu -#define LONG_SUBIU subu -#define LONG_L lw -#define LONG_LA la -#define LONG_S sw -#define LONG_SLL sll -#define LONG_SLLV sllv -#define LONG_SRL srl -#define LONG_SRLV srlv -#define LONG_SRA sra -#define LONG_SRAV srav -#define LONG_LL ll -#define LONG_SC sc -#define LONG_WORD .word -#define LONG_SCALESHIFT 2 -#else -#define LONG_ADD dadd -#define LONG_ADDI daddi -#define LONG_ADDU daddu -#define LONG_ADDIU daddiu -#define LONG_SUB dadd -#define LONG_SUBI dsubi -#define LONG_SUBU dsubu -#define LONG_SUBIU dsubu -#define LONG_L ld -#define LONG_LA dla -#define LONG_S sd -#define LONG_SLL dsll -#define LONG_SLLV dsllv -#define LONG_SRL dsrl -#define LONG_SRLV dsrlv -#define LONG_SRA dsra -#define LONG_SRAV dsrav -#define LONG_LL lld -#define LONG_SC scd -#define LONG_WORD .dword -#define LONG_SCALESHIFT 3 -#endif - -#if SZREG == 4 -#define REG_L lw -#define REG_S sw -#define REG_LI li -#define REG_ADDU addu -#define REG_SLL sll -#define REG_SLLV sllv -#define REG_SRL srl -#define REG_SRLV srlv -#define REG_SRA sra -#define REG_SRAV srav -#define REG_LL ll -#define REG_SC sc -#define REG_SCALESHIFT 2 -#else -#define REG_L ld -#define REG_S sd -#define REG_LI dli -#define REG_ADDU daddu -#define REG_SLL dsll -#define REG_SLLV dsllv -#define REG_SRL dsrl -#define REG_SRLV dsrlv -#define REG_SRA dsra -#define REG_SRAV dsrav -#define REG_LL lld -#define REG_SC scd -#define REG_SCALESHIFT 3 -#endif - -#if _MIPS_ISA == _MIPS_ISA_MIPS1 || _MIPS_ISA == _MIPS_ISA_MIPS2 || \ - _MIPS_ISA == _MIPS_ISA_MIPS32 -#define MFC0 mfc0 -#define MTC0 mtc0 -#endif -#if _MIPS_ISA == _MIPS_ISA_MIPS3 || _MIPS_ISA == _MIPS_ISA_MIPS4 || \ - _MIPS_ISA == _MIPS_ISA_MIPS64 -#define MFC0 dmfc0 -#define MTC0 dmtc0 -#endif - -#if defined(__mips_o32) || defined(__mips_o64) - -#ifdef __ABICALLS__ -#define CPRESTORE(r) .cprestore r -#define CPLOAD(r) .cpload r -#else -#define CPRESTORE(r) /* not needed */ -#define CPLOAD(r) /* not needed */ -#endif - -#define SETUP_GP \ - .set push; \ - .set noreorder; \ - .cpload t9; \ - .set pop -#define SETUP_GPX(r) \ - .set push; \ - .set noreorder; \ - move r,ra; /* save old ra */ \ - bal 7f; \ - nop; \ - 7: .cpload ra; \ - move ra,r; \ - .set pop -#define SETUP_GPX_L(r,lbl) \ - .set push; \ - .set noreorder; \ - move r,ra; /* save old ra */ \ - bal lbl; \ - nop; \ - lbl: .cpload ra; \ - move ra,r; \ - .set pop -#define SAVE_GP(x) .cprestore x - -#define SETUP_GP64(a,b) /* n32/n64 specific */ -#define SETUP_GP64_R(a,b) /* n32/n64 specific */ -#define SETUP_GPX64(a,b) /* n32/n64 specific */ -#define SETUP_GPX64_L(a,b,c) /* n32/n64 specific */ -#define RESTORE_GP64 /* n32/n64 specific */ -#define USE_ALT_CP(a) /* n32/n64 specific */ -#endif /* __mips_o32 || __mips_o64 */ - -#if defined(__mips_o32) || defined(__mips_o64) -#define REG_PROLOGUE .set push -#define REG_EPILOGUE .set pop -#endif -#if defined(__mips_n32) || defined(__mips_n64) -#define REG_PROLOGUE .set push ; .set mips3 -#define REG_EPILOGUE .set pop -#endif - -#if defined(__mips_n32) || defined(__mips_n64) -#define SETUP_GP /* o32 specific */ -#define SETUP_GPX(r) /* o32 specific */ -#define SETUP_GPX_L(r,lbl) /* o32 specific */ -#define SAVE_GP(x) /* o32 specific */ -#define SETUP_GP64(a,b) .cpsetup $25, a, b -#define SETUP_GPX64(a,b) \ - .set push; \ - move b,ra; \ - .set noreorder; \ - bal 7f; \ - nop; \ - 7: .set pop; \ - .cpsetup ra, a, 7b; \ - move ra,b -#define SETUP_GPX64_L(a,b,c) \ - .set push; \ - move b,ra; \ - .set noreorder; \ - bal c; \ - nop; \ - c: .set pop; \ - .cpsetup ra, a, c; \ - move ra,b -#define RESTORE_GP64 .cpreturn -#define USE_ALT_CP(a) .cplocal a -#endif /* __mips_n32 || __mips_n64 */ - -#define GET_CPU_PCPU(reg) \ - PTR_L reg, _C_LABEL(pcpup); - -/* - * Description of the setjmp buffer - * - * word 0 magic number (dependant on creator) - * 1 RA - * 2 S0 - * 3 S1 - * 4 S2 - * 5 S3 - * 6 S4 - * 7 S5 - * 8 S6 - * 9 S7 - * 10 SP - * 11 S8 - * 12 GP (dependent on ABI) - * 13 signal mask (dependant on magic) - * 14 (con't) - * 15 (con't) - * 16 (con't) - * - * The magic number number identifies the jmp_buf and - * how the buffer was created as well as providing - * a sanity check - * - */ - -#define _JB_MAGIC__SETJMP 0xBADFACED -#define _JB_MAGIC_SETJMP 0xFACEDBAD - -/* Valid for all jmp_buf's */ - -#define _JB_MAGIC 0 -#define _JB_REG_RA 1 -#define _JB_REG_S0 2 -#define _JB_REG_S1 3 -#define _JB_REG_S2 4 -#define _JB_REG_S3 5 -#define _JB_REG_S4 6 -#define _JB_REG_S5 7 -#define _JB_REG_S6 8 -#define _JB_REG_S7 9 -#define _JB_REG_SP 10 -#define _JB_REG_S8 11 -#if defined(__mips_n32) || defined(__mips_n64) -#define _JB_REG_GP 12 -#endif - -/* Only valid with the _JB_MAGIC_SETJMP magic */ - -#define _JB_SIGMASK 13 -#define __JB_SIGMASK_REMAINDER 14 /* sigmask_t is 128-bits */ - -#define _JB_FPREG_F20 15 -#define _JB_FPREG_F21 16 -#define _JB_FPREG_F22 17 -#define _JB_FPREG_F23 18 -#define _JB_FPREG_F24 19 -#define _JB_FPREG_F25 20 -#define _JB_FPREG_F26 21 -#define _JB_FPREG_F27 22 -#define _JB_FPREG_F28 23 -#define _JB_FPREG_F29 24 -#define _JB_FPREG_F30 25 -#define _JB_FPREG_F31 26 -#define _JB_FPREG_FCSR 27 - -/* - * Various macros for dealing with TLB hazards - * (a) why so many? - * (b) when to use? - * (c) why not used everywhere? - */ -/* - * Assume that w alaways need nops to escape CP0 hazard - * TODO: Make hazard delays configurable. Stuck with 5 cycles on the moment - * For more info on CP0 hazards see Chapter 7 (p.99) of "MIPS32 Architecture - * For Programmers Volume III: The MIPS32 Privileged Resource Architecture" - */ -#if defined(CPU_NLM) -#define HAZARD_DELAY sll $0,3 -#define ITLBNOPFIX sll $0,3 -#elif defined(CPU_RMI) -#define HAZARD_DELAY -#define ITLBNOPFIX -#elif defined(CPU_MIPS74K) -#define HAZARD_DELAY sll $0,$0,3 -#define ITLBNOPFIX sll $0,$0,3 -#else -#define ITLBNOPFIX nop;nop;nop;nop;nop;nop;nop;nop;nop;sll $0,$0,3; -#define HAZARD_DELAY nop;nop;nop;nop;sll $0,$0,3; -#endif - -#endif /* !_MACHINE_ASM_H_ */ +#endif /* !_MACHINE_ABI_H_ */ Modified: head/sys/mips/include/asm.h ============================================================================== --- head/sys/mips/include/asm.h Wed Jan 31 16:56:02 2018 (r328628) +++ head/sys/mips/include/asm.h Wed Jan 31 17:36:39 2018 (r328629) @@ -58,6 +58,7 @@ #ifndef _MACHINE_ASM_H_ #define _MACHINE_ASM_H_ +#include <machine/abi.h> #include <machine/regdef.h> #include <machine/endian.h> #include <machine/cdefs.h> @@ -263,12 +264,6 @@ _C_LABEL(x): .asciiz str; \ .align 3 -#if defined(__mips_o32) -#define SZREG 4 -#else -#define SZREG 8 -#endif - #if defined(__mips_o32) || defined(__mips_o64) #define ALSK 7 /* stack alignment */ #define ALMASK -7 /* stack alignment */ @@ -282,28 +277,6 @@ _C_LABEL(x): #define FP_L ldc1 #define FP_S sdc1 #endif - -/* - * standard callframe { - * register_t cf_pad[N]; o32/64 (N=0), n32 (N=1) n64 (N=1) - * register_t cf_args[4]; arg0 - arg3 (only on o32 and o64) - * register_t cf_gp; global pointer (only on n32 and n64) - * register_t cf_sp; frame pointer - * register_t cf_ra; return address - * }; - */ -#if defined(__mips_o32) || defined(__mips_o64) -#define CALLFRAME_SIZ (SZREG * (4 + 2)) -#define CALLFRAME_S0 0 -#elif defined(__mips_n32) || defined(__mips_n64) -#define CALLFRAME_SIZ (SZREG * 4) -#define CALLFRAME_S0 (CALLFRAME_SIZ - 4 * SZREG) -#endif -#ifndef _KERNEL -#define CALLFRAME_GP (CALLFRAME_SIZ - 3 * SZREG) -#endif -#define CALLFRAME_SP (CALLFRAME_SIZ - 2 * SZREG) -#define CALLFRAME_RA (CALLFRAME_SIZ - 1 * SZREG) /* * Endian-independent assembly-code aliases for unaligned memory accesses. Modified: head/sys/mips/mips/pm_machdep.c ============================================================================== --- head/sys/mips/mips/pm_machdep.c Wed Jan 31 16:56:02 2018 (r328628) +++ head/sys/mips/mips/pm_machdep.c Wed Jan 31 17:36:39 2018 (r328629) @@ -62,6 +62,7 @@ __FBSDID("$FreeBSD$"); #include <vm/vm_extern.h> #include <sys/user.h> #include <sys/uio.h> +#include <machine/abi.h> #include <machine/cpuinfo.h> #include <machine/reg.h> #include <machine/md_var.h> @@ -132,10 +133,10 @@ sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask SIGISMEMBER(psp->ps_sigonstack, sig)) { sfp = (struct sigframe *)(((uintptr_t)td->td_sigstk.ss_sp + td->td_sigstk.ss_size - sizeof(struct sigframe)) - & ~(sizeof(__int64_t) - 1)); + & ~(STACK_ALIGN - 1)); } else sfp = (struct sigframe *)((vm_offset_t)(regs->sp - - sizeof(struct sigframe)) & ~(sizeof(__int64_t) - 1)); + sizeof(struct sigframe)) & ~(STACK_ALIGN - 1)); /* Build the argument list for the signal handler. */ regs->a0 = sig; @@ -408,12 +409,7 @@ exec_setregs(struct thread *td, struct image_params *i bzero((caddr_t)td->td_frame, sizeof(struct trapframe)); - /* - * The stack pointer has to be aligned to accommodate the largest - * datatype at minimum. This probably means it should be 16-byte - * aligned, but for now we're 8-byte aligning it. - */ - td->td_frame->sp = ((register_t) stack) & ~(sizeof(__int64_t) - 1); + td->td_frame->sp = ((register_t)stack) & ~(STACK_ALIGN - 1); /* * If we're running o32 or n32 programs but have 64-bit registers, Modified: head/sys/mips/mips/vm_machdep.c ============================================================================== --- head/sys/mips/mips/vm_machdep.c Wed Jan 31 16:56:02 2018 (r328628) +++ head/sys/mips/mips/vm_machdep.c Wed Jan 31 17:36:39 2018 (r328629) @@ -59,6 +59,7 @@ __FBSDID("$FreeBSD$"); #include <sys/sysctl.h> #include <sys/unistd.h> +#include <machine/abi.h> #include <machine/cache.h> #include <machine/clock.h> #include <machine/cpu.h> @@ -82,18 +83,6 @@ __FBSDID("$FreeBSD$"); #include <sys/user.h> #include <sys/mbuf.h> -/* Duplicated from asm.h */ -#if defined(__mips_o32) -#define SZREG 4 -#else -#define SZREG 8 -#endif -#if defined(__mips_o32) || defined(__mips_o64) -#define CALLFRAME_SIZ (SZREG * (4 + 2)) -#elif defined(__mips_n32) || defined(__mips_n64) -#define CALLFRAME_SIZ (SZREG * 4) -#endif - /* * Finish a fork operation, with process p2 nearly set up. * Copy and update the pcb, set up the stack so that the child @@ -430,13 +419,7 @@ cpu_set_upcall(struct thread *td, void (*entry)(void * struct trapframe *tf; register_t sp; - /* - * At the point where a function is called, sp must be 8 - * byte aligned[for compatibility with 64-bit CPUs] - * in ``See MIPS Run'' by D. Sweetman, p. 269 - * align stack - */ - sp = (((intptr_t)stack->ss_sp + stack->ss_size) & ~0x7) - + sp = (((intptr_t)stack->ss_sp + stack->ss_size) & ~(STACK_ALIGN - 1)) - CALLFRAME_SIZ; /*
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