From owner-svn-src-head@freebsd.org Sun Jun 10 16:21:22 2018 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id BE2B6101FF69; Sun, 10 Jun 2018 16:21:22 +0000 (UTC) (envelope-from andrew@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 6FAAA6A92A; Sun, 10 Jun 2018 16:21:22 +0000 (UTC) (envelope-from andrew@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 50F7D73F9; Sun, 10 Jun 2018 16:21:22 +0000 (UTC) (envelope-from andrew@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id w5AGLMqD013899; Sun, 10 Jun 2018 16:21:22 GMT (envelope-from andrew@FreeBSD.org) Received: (from andrew@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id w5AGLLL6013897; Sun, 10 Jun 2018 16:21:21 GMT (envelope-from andrew@FreeBSD.org) Message-Id: <201806101621.w5AGLLL6013897@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: andrew set sender to andrew@FreeBSD.org using -f From: Andrew Turner Date: Sun, 10 Jun 2018 16:21:21 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r334926 - head/sys/arm64/arm64 X-SVN-Group: head X-SVN-Commit-Author: andrew X-SVN-Commit-Paths: head/sys/arm64/arm64 X-SVN-Commit-Revision: 334926 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 10 Jun 2018 16:21:23 -0000 Author: andrew Date: Sun Jun 10 16:21:21 2018 New Revision: 334926 URL: https://svnweb.freebsd.org/changeset/base/334926 Log: Clean up handling of unexpected exceptions. Previously we would issue a breakpoint instruction, however this would lose information that may be useful for debugging. These are now handled in a similar way to other exceptions, however it won't exit out of the exception handler until it is known if we can handle these exceptions in a useful way. Sponsored by: DARPA, AFRL Modified: head/sys/arm64/arm64/exception.S head/sys/arm64/arm64/trap.c Modified: head/sys/arm64/arm64/exception.S ============================================================================== --- head/sys/arm64/arm64/exception.S Sun Jun 10 14:49:13 2018 (r334925) +++ head/sys/arm64/arm64/exception.S Sun Jun 10 16:21:21 2018 (r334926) @@ -161,10 +161,6 @@ ENTRY(handle_el1h_irq) eret END(handle_el1h_irq) -ENTRY(handle_el1h_error) - brk 0xf13 -END(handle_el1h_error) - ENTRY(handle_el0_sync) save_registers 0 ldr x0, [x18, #PC_CURTHREAD] @@ -185,18 +181,23 @@ ENTRY(handle_el0_irq) eret END(handle_el0_irq) -ENTRY(handle_el0_error) +ENTRY(handle_serror) save_registers 0 mov x0, sp - bl do_el0_error - brk 0xf23 - 1: b 1b -END(handle_el0_error) +1: bl do_serror + b 1b +END(handle_serror) +ENTRY(handle_empty_exception) + save_registers 0 + mov x0, sp +1: bl unhandled_exception + b 1b +END(handle_unhandled_exception) + .macro vempty .align 7 - brk 0xfff - 1: b 1b + b handle_empty_exception .endm .macro vector name @@ -215,15 +216,15 @@ exception_vectors: vector el1h_sync /* Synchronous EL1h */ vector el1h_irq /* IRQ EL1h */ vempty /* FIQ EL1h */ - vector el1h_error /* Error EL1h */ + vector serror /* Error EL1h */ vector el0_sync /* Synchronous 64-bit EL0 */ vector el0_irq /* IRQ 64-bit EL0 */ vempty /* FIQ 64-bit EL0 */ - vector el0_error /* Error 64-bit EL0 */ + vector serror /* Error 64-bit EL0 */ vector el0_sync /* Synchronous 32-bit EL0 */ vector el0_irq /* IRQ 32-bit EL0 */ vempty /* FIQ 32-bit EL0 */ - vector el0_error /* Error 32-bit EL0 */ + vector serror /* Error 32-bit EL0 */ Modified: head/sys/arm64/arm64/trap.c ============================================================================== --- head/sys/arm64/arm64/trap.c Sun Jun 10 14:49:13 2018 (r334925) +++ head/sys/arm64/arm64/trap.c Sun Jun 10 16:21:21 2018 (r334926) @@ -76,6 +76,9 @@ extern register_t fsu_intr_fault; void do_el1h_sync(struct thread *, struct trapframe *); void do_el0_sync(struct thread *, struct trapframe *); void do_el0_error(struct trapframe *); +void do_serror(struct trapframe *); +void unhandled_exception(struct trapframe *); + static void print_registers(struct trapframe *frame); int (*dtrace_invop_jump_addr)(struct trapframe *); @@ -477,10 +480,33 @@ do_el0_sync(struct thread *td, struct trapframe *frame ("Kernel VFP state in use when entering userspace")); } +/* + * TODO: We will need to handle these later when we support ARMv8.2 RAS. + */ void -do_el0_error(struct trapframe *frame) +do_serror(struct trapframe *frame) { + uint64_t esr, far; - panic("ARM64TODO: do_el0_error"); + far = READ_SPECIALREG(far_el1); + esr = frame->tf_esr; + + print_registers(frame); + printf(" far: %16lx\n", far); + printf(" esr: %.8lx\n", esr); + panic("Unhandled System Error"); } +void +unhandled_exception(struct trapframe *frame) +{ + uint64_t esr, far; + + far = READ_SPECIALREG(far_el1); + esr = frame->tf_esr; + + print_registers(frame); + printf(" far: %16lx\n", far); + printf(" esr: %.8lx\n", esr); + panic("Unhandled exception"); +}